{"id":89616,"date":"2019-04-10T09:30:59","date_gmt":"2019-04-10T09:30:59","guid":{"rendered":"https:\/\/\/tsmc-annonce-son-processus-5nm\/"},"modified":"2019-04-10T09:30:59","modified_gmt":"2019-04-10T09:30:59","slug":"tsmc-annonce-son-processus-5nm","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/","title":{"rendered":"TSMC annonce son processus 5nm"},"content":{"rendered":"

Le processus FinFET \u00e0 5nm sera destin\u00e9 initialement tout comme son pr\u00e9decesseur 7nm aux applications informatiques mobiles et composants informatiques de hautes performances.<\/p>\n

L’infrastructure de conception comprend des fichiers technologiques, des kits de conception de processus (PDK), des outils, des flux de conception entre des outils et des c\u0153urs IP valid\u00e9s avec une production de silicium de test. Des soci\u00e9t\u00e9s telles que ARM, Cadence et Synopsys ont collabor\u00e9 avec TSMC pour cr\u00e9er l’infrastructure de conception.<\/span><\/p>\n

Compar\u00e9 au processus 7 nm de TSMC, le processus 5 nm offre une densit\u00e9 logique de 1,8X et un gain de vitesse de 15% sur un c\u0153ur ARM Cortex-A72. Le processus \u00e0 5 nm donne de meilleurs r\u00e9sultats de rendement que tous les autres processus de TSMC \u00e0 la m\u00eame \u00e9tape de leur d\u00e9ploiement, a d\u00e9clar\u00e9 TSMC.<\/span><\/p>\n

\u00ab\u00a0La technologie 5 nanom\u00e8tres de TSMC offre \u00e0 ses clients le processus logique le plus avanc\u00e9 du secteur pour r\u00e9pondre \u00e0 la demande en croissance exponentielle de puissance de calcul tir\u00e9e par l’IA et la 5G\u00a0\u00bb, a d\u00e9clar\u00e9 Cliff Hou, vice-pr\u00e9sident du d\u00e9veloppement technologique chez TSMC.<\/span><\/p>\n

Les PDK \u00e0 5 nm incluent: symboles de composants, Pcells, netlisting et fichiers de conception, de simulation, de placement, remplissage factice, extraction de param\u00e8tres, v\u00e9rification physique et signature. La Foundation IP comprend des ensembles haute densit\u00e9 et hautes performances de biblioth\u00e8ques de cellules standard et de compilateurs de m\u00e9moire.<\/span><\/p>\n

\u00ab\u00a0Plusieurs clients communs ont r\u00e9alis\u00e9 avec succ\u00e8s des \u00ab\u00a0tape-outs\u00a0\u00bb de production de 5 nm utilisant les outils, les flux et la propri\u00e9t\u00e9 intellectuelle de Cadence pour un d\u00e9veloppement complet de la production\u00a0\u00bb, a d\u00e9clar\u00e9 Aniruth Devgan, pr\u00e9sident de Cadence, dans un communiqu\u00e9 publi\u00e9 par TSMC.<\/span><\/p>\n

\u00e0 lire \u00e9galement:<\/strong><\/p>\n

Un transistor mono-atome qui fonctionne \u00e0 temp\u00e9rature ambiante!<\/a><\/p>\n

ARM d\u00e9fie Intel avec de nouveaux processeurs PC<\/a><\/p>\n

14nm: Intel n’y arrive pas et sous-traiterait \u00e0 TSMC ?<\/a><\/p>\n

 <\/p>\n

Related links and articles in English: <\/strong><\/p>\n

www.tsmc.com<\/a><\/p>\n

News articles:<\/strong><\/p>\n

Intel in the slow lane<\/a><\/p>\n

Update: IMEC, Cadence tape out first 5nm test chip <\/a><\/p>\n

Cadence gets EDA certification for TSMC’s 5nm and 7nm+ FinFET processes<\/a><\/p>\n

Samsung to introduce nanosheet transistors in 3nm node<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

La fonderie TSMC (Hsinchu, Taiwan) a annonc\u00e9 la livraison de la version compl\u00e8te de son infrastructure de conception FinFET 5nm au sein de sa plate-forme Open Innovation, le processus est d\u00e9j\u00e0 en cours de \u00ab\u00a0production \u00e0 risque\u00a0\u00bb.<\/p>\n","protected":false},"author":22,"featured_media":89617,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[880],"tags":[899,913,906,908],"domains":[47],"ppma_author":[1149],"class_list":["post-89616","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-actualites-economiques","tag-eda-cad-tools-fr","tag-materials-processes-fr","tag-mpus-mcus-fr","tag-plds-fpgas-asics-fr","domains-electronique-eci"],"acf":[],"yoast_head":"TSMC annonce son processus 5nm ...<\/title>\n<meta name=\"description\" content=\"La fonderie TSMC (Hsinchu, Taiwan) a annonc\u00e9 la livraison de la version compl\u00e8te de son infrastructure de conception FinFET 5nm au sein de sa plate-forme...\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/89616\/\" \/>\n<meta property=\"og:locale\" content=\"fr_FR\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"TSMC annonce son processus 5nm\" \/>\n<meta property=\"og:description\" content=\"La fonderie TSMC (Hsinchu, Taiwan) a annonc\u00e9 la livraison de la version compl\u00e8te de son infrastructure de conception FinFET 5nm au sein de sa plate-forme Open Innovation, le processus est d\u00e9j\u00e0 en cours de "production \u00e0 risque".\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/89616\/\" \/>\n<meta property=\"og:site_name\" content=\"EENewsEurope\" \/>\n<meta property=\"article:published_time\" content=\"2019-04-10T09:30:59+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/import\/default\/files\/sites\/default\/files\/images\/screen_shot_2019-04-04_at_14.57.31.png\" \/>\n\t<meta property=\"og:image:width\" content=\"615\" \/>\n\t<meta property=\"og:image:height\" content=\"381\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/png\" \/>\n<meta name=\"author\" content=\"eeNews Europe\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"eeNews Europe\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"2 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/#article\",\"isPartOf\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/\"},\"author\":{\"name\":\"eeNews Europe\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/9eff4051fa9dac8230052de45e32b0f4\"},\"headline\":\"TSMC annonce son processus 5nm\",\"datePublished\":\"2019-04-10T09:30:59+00:00\",\"dateModified\":\"2019-04-10T09:30:59+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/\"},\"wordCount\":368,\"publisher\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#organization\"},\"keywords\":[\"EDA & CAD tools\",\"Materials & processes\",\"MPUs\/MCUs\",\"PLDs\/FPGAs\/ASICs\"],\"articleSection\":[\"Actualit\u00e9s \u00e9conomiques\"],\"inLanguage\":\"fr-FR\"},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/\",\"url\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/\",\"name\":\"TSMC annonce son processus 5nm -\",\"isPartOf\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#website\"},\"datePublished\":\"2019-04-10T09:30:59+00:00\",\"dateModified\":\"2019-04-10T09:30:59+00:00\",\"breadcrumb\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/#breadcrumb\"},\"inLanguage\":\"fr-FR\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/\"]}]},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\/\/www.ecinews.fr\/fr\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"TSMC annonce son processus 5nm\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#website\",\"url\":\"https:\/\/www.ecinews.fr\/fr\/\",\"name\":\"EENewsEurope\",\"description\":\"Just another WordPress site\",\"publisher\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\/\/www.ecinews.fr\/fr\/?s={search_term_string}\"},\"query-input\":\"required name=search_term_string\"}],\"inLanguage\":\"fr-FR\"},{\"@type\":\"Organization\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#organization\",\"name\":\"EENewsEurope\",\"url\":\"https:\/\/www.ecinews.fr\/fr\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"fr-FR\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/\",\"url\":\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg\",\"contentUrl\":\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg\",\"width\":283,\"height\":113,\"caption\":\"EENewsEurope\"},\"image\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/\"}},{\"@type\":\"Person\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/9eff4051fa9dac8230052de45e32b0f4\",\"name\":\"eeNews Europe\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"fr-FR\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/image\/fae8f0cb15861c4ae0ed4872e2c9fc22\",\"url\":\"https:\/\/secure.gravatar.com\/avatar\/5081509054e28b04ecd976976e723ce0?s=96&d=mm&r=g\",\"contentUrl\":\"https:\/\/secure.gravatar.com\/avatar\/5081509054e28b04ecd976976e723ce0?s=96&d=mm&r=g\",\"caption\":\"eeNews Europe\"}}]}<\/script>","yoast_head_json":{"title":"TSMC annonce son processus 5nm ...","description":"La fonderie TSMC (Hsinchu, Taiwan) a annonc\u00e9 la livraison de la version compl\u00e8te de son infrastructure de conception FinFET 5nm au sein de sa plate-forme...","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/89616\/","og_locale":"fr_FR","og_type":"article","og_title":"TSMC annonce son processus 5nm","og_description":"La fonderie TSMC (Hsinchu, Taiwan) a annonc\u00e9 la livraison de la version compl\u00e8te de son infrastructure de conception FinFET 5nm au sein de sa plate-forme Open Innovation, le processus est d\u00e9j\u00e0 en cours de \"production \u00e0 risque\".","og_url":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/89616\/","og_site_name":"EENewsEurope","article_published_time":"2019-04-10T09:30:59+00:00","og_image":[{"width":615,"height":381,"url":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/import\/default\/files\/sites\/default\/files\/images\/screen_shot_2019-04-04_at_14.57.31.png","type":"image\/png"}],"author":"eeNews Europe","twitter_card":"summary_large_image","twitter_misc":{"Written by":"eeNews Europe","Est. reading time":"2 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/#article","isPartOf":{"@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/"},"author":{"name":"eeNews Europe","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/9eff4051fa9dac8230052de45e32b0f4"},"headline":"TSMC annonce son processus 5nm","datePublished":"2019-04-10T09:30:59+00:00","dateModified":"2019-04-10T09:30:59+00:00","mainEntityOfPage":{"@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/"},"wordCount":368,"publisher":{"@id":"https:\/\/www.ecinews.fr\/fr\/#organization"},"keywords":["EDA & CAD tools","Materials & processes","MPUs\/MCUs","PLDs\/FPGAs\/ASICs"],"articleSection":["Actualit\u00e9s \u00e9conomiques"],"inLanguage":"fr-FR"},{"@type":"WebPage","@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/","url":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/","name":"TSMC annonce son processus 5nm -","isPartOf":{"@id":"https:\/\/www.ecinews.fr\/fr\/#website"},"datePublished":"2019-04-10T09:30:59+00:00","dateModified":"2019-04-10T09:30:59+00:00","breadcrumb":{"@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/#breadcrumb"},"inLanguage":"fr-FR","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-annonce-son-processus-5nm\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.ecinews.fr\/fr\/"},{"@type":"ListItem","position":2,"name":"TSMC annonce son processus 5nm"}]},{"@type":"WebSite","@id":"https:\/\/www.ecinews.fr\/fr\/#website","url":"https:\/\/www.ecinews.fr\/fr\/","name":"EENewsEurope","description":"Just another WordPress site","publisher":{"@id":"https:\/\/www.ecinews.fr\/fr\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.ecinews.fr\/fr\/?s={search_term_string}"},"query-input":"required name=search_term_string"}],"inLanguage":"fr-FR"},{"@type":"Organization","@id":"https:\/\/www.ecinews.fr\/fr\/#organization","name":"EENewsEurope","url":"https:\/\/www.ecinews.fr\/fr\/","logo":{"@type":"ImageObject","inLanguage":"fr-FR","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/","url":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg","contentUrl":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg","width":283,"height":113,"caption":"EENewsEurope"},"image":{"@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/"}},{"@type":"Person","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/9eff4051fa9dac8230052de45e32b0f4","name":"eeNews Europe","image":{"@type":"ImageObject","inLanguage":"fr-FR","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/image\/fae8f0cb15861c4ae0ed4872e2c9fc22","url":"https:\/\/secure.gravatar.com\/avatar\/5081509054e28b04ecd976976e723ce0?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/5081509054e28b04ecd976976e723ce0?s=96&d=mm&r=g","caption":"eeNews Europe"}}]}},"authors":[{"term_id":1149,"user_id":22,"is_guest":0,"slug":"eenews-europe","display_name":"eeNews Europe","avatar_url":"https:\/\/secure.gravatar.com\/avatar\/5081509054e28b04ecd976976e723ce0?s=96&d=mm&r=g","0":null,"1":"","2":"","3":"","4":"","5":"","6":"","7":"","8":""}],"_links":{"self":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/89616"}],"collection":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/users\/22"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/comments?post=89616"}],"version-history":[{"count":0,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/89616\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/media\/89617"}],"wp:attachment":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/media?parent=89616"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/categories?post=89616"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/tags?post=89616"},{"taxonomy":"domains","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/domains?post=89616"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/ppma_author?post=89616"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}