{"id":8791,"date":"2021-06-30T16:24:03","date_gmt":"2021-06-30T16:24:03","guid":{"rendered":"https:\/\/\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/"},"modified":"2021-06-30T16:24:03","modified_gmt":"2021-06-30T16:24:03","slug":"la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/","title":{"rendered":"La fonderie Samsung Foundry finalise le tapeout d&rsquo;une puce 3nm GAA"},"content":{"rendered":"<p><!-- Global site tag (gtag.js) - Google Analytics --><\/p>\n<p>S&rsquo;attaquant \u00e0 TSMC pour \u00eatre \u00e0 la pointe de la technologie des process, Samsung Foundry a cr\u00e9\u00e9 une puce de 3 nm qui utilise son architecture de transistor Gate-all-around (GAA).<\/p>\n<p>Cela n\u00e9cessite un ensemble d&rsquo;outils de conception et de qualification diff\u00e9rents des structures de transistors FinFET utilis\u00e9es par TSMC et Intel. Samsung a donc utilis\u00e9 la plate-forme de conception Fusion de Synopsys. Le kit de conception physique (PDK) du process&nbsp;a \u00e9t\u00e9 publi\u00e9 en mai 2019 et les outils ont \u00e9t\u00e9 qualifi\u00e9s sur le process&nbsp;l&rsquo;ann\u00e9e derni\u00e8re.<\/p>\n<p>Le tapeout \u00e9tait l&rsquo;aboutissement d&rsquo;une collaboration \u00e9tendue entre Synopsys et Samsung Foundry pour acc\u00e9l\u00e9rer la livraison d&rsquo;une m\u00e9thodologie de r\u00e9f\u00e9rence hautement optimis\u00e9e pour le processus GAA.<\/p>\n<p>Le flux de conception de r\u00e9f\u00e9rence comprend un flux de conception RTL vers GDSII int\u00e9gr\u00e9&nbsp;avec golden-signoff coupl\u00e9 avec des produits golden-signoff. Le flux est destin\u00e9 aux clients souhaitant utiliser le processus 3 nm GAA pour des puces dans les applications de calcul haute performance (HPC), 5G, mobiles et des applications avanc\u00e9es d&rsquo;intelligence artificielle (IA).<\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/news\/samsung-releases-pdk-3nm-gate-all-around-processes\">Samsung releases PDK for 3nm gate-all-around process<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/news\/tools-enable-3nm-designs-samsung-process\">Samsung 3nm designs can start on Cadence EDA tools<\/a><\/li>\n<\/ul>\n<p>\u00ab&nbsp;Samsung Foundry est au c\u0153ur de la prochaine phase d&rsquo;innovation de l&rsquo;industrie avec nos \u00e9volutions continues bas\u00e9es sur la technologie des process&nbsp;pour r\u00e9pondre \u00e0 la fois aux demandes croissantes d&rsquo;applications sp\u00e9cialis\u00e9es et celles des march\u00e9s plus&nbsp;larges&nbsp;\u00bb, a d\u00e9clar\u00e9 Sangyun Kim, vice-pr\u00e9sident de l&rsquo;\u00e9quipe de technologie de conception de fonderie chez Samsung Electronics. \u00ab&nbsp;Notre nouveau&nbsp;processus GAA 3 nm avanc\u00e9 qui a b\u00e9n\u00e9fici\u00e9 de notre collaboration \u00e9troite&nbsp;avec Synopsys, et de la mise en place&nbsp;acc\u00e9l\u00e9r\u00e9e de la plate-forme de conception Fusion pour permettre la r\u00e9alisation efficace du process&nbsp;3 nm, t\u00e9moigne de l&rsquo;importance et des avantages de ces alliances cl\u00e9s. .\u00a0\u00bb<\/p>\n<p>L&rsquo;architecture GAA a des propri\u00e9t\u00e9s \u00e9lectrostatiques am\u00e9lior\u00e9es qui se traduisent par des performances accrues et une consommation&nbsp;r\u00e9duite avec l&rsquo;avantage suppl\u00e9mentaire de nouvelles opportunit\u00e9s d&rsquo;optimisation bas\u00e9es sur le vecteur suppl\u00e9mentaire du&nbsp;contr\u00f4le de la largeur des nano-feuilles, explique Samsung. Utilis\u00e9 avec un r\u00e9glage de seuil de tension bien \u00e9tabli, cela offre plus de moyens d&rsquo;optimiser la conception pour r\u00e9duire la consommation, augmenter les performances ou r\u00e9duire la taille de la puce&nbsp;(PPA).<\/p>\n<p>Le flux de conception inclut \u00e9galement la prise en charge de m\u00e9thodologies de placement complexes et de r\u00e8gles de plan d&rsquo;\u00e9tage, de nouvelles r\u00e8gles de routage et une variabilit\u00e9 accrue. Le flux est bas\u00e9 sur un mod\u00e8le de donn\u00e9es unique et utilise une architecture d&rsquo;optimisation commune, plut\u00f4t que de combiner des outils ponctuels.<\/p>\n<p>\u00ab La structure du transistor GAA marque un point d&rsquo;inflexion cl\u00e9 dans l&rsquo;avancement de la technologie des process&nbsp;qui est essentiel pour maintenir les trajectoires de mise \u00e0 l&rsquo;\u00e9chelle n\u00e9cessaires \u00e0 la prochaine vague d&rsquo;innovation \u00e0 grande \u00e9chelle \u00bb, a d\u00e9clar\u00e9 Shankar Krishnamoorthy, directeur g\u00e9n\u00e9ral du Digital Design Group chez Synopsys. \u00ab Nos collaborations strat\u00e9giques avec Samsung Foundry pour&nbsp;la co-fourniture des meilleures technologies et solutions garantissent la poursuite de ces tendances de mise \u00e0 l&rsquo;\u00e9chelle et les opportunit\u00e9s associ\u00e9es qu&rsquo;elles offrent \u00e0 l&rsquo;ensemble de l&rsquo;industrie des semiconducteurs.<\/p>\n<p>Les fichiers de technologie Synopsys sont disponibles aupr\u00e8s de Samsung Foundry pour le process&nbsp;de technologie 3 nm GAA.<\/p>\n<p>La plate-forme de conception Fusion comprend Fusion Compiler, IC Compiler II \u00ab\u00a0place-and-route\u00a0\u00bb et Design Compiler&nbsp;RTL-synth\u00e8se pour la conception num\u00e9rique, le signoff de synchronisation PrimeTime, le signoff&nbsp;d&rsquo;extraction StarRC, le signoff&nbsp;physique IC \u200b\u200bValidator et la caract\u00e9risation de la biblioth\u00e8que SiliconSmart.<\/p>\n<p><strong>Lire aussi:<\/strong><\/p>\n<p><a href=\"https:\/\/www.ecinews.fr\/node\/135192\"><strong>Samsung planifie une Fab 3nm \u00e0 $10 milliards au Texas<\/strong><\/a><\/p>\n<p><a href=\"https:\/\/www.ecinews.fr\/news\/tsmc-prepare-le-process-de-fabrication-2nm\"><strong>TSMC pr\u00e9pare le process de fabrication 2nm<\/strong><\/a><\/p>\n<p><a href=\"https:\/\/c212.net\/c\/link\/?t=0&amp;l=en&amp;o=3209746-1&amp;h=2096485158&amp;u=http%3A%2F%2Fwww.synopsys.com%2Ffusion&amp;a=www.synopsys.com%2Ffusion\" target=\"_blank\" rel=\"noopener\">www.synopsys.com\/fusion<\/a><\/p>\n<p><strong>Related 3nm articles <\/strong><\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/news\/samsung-introduce-nanosheet-transistors-3nm-node\/page\/0\/1?news_id=106302\">Samsung to introduce nanosheet transistors in 3nm node<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/news\/tools-enable-3nm-designs-samsung-process\/page\/0\/1\">Tools enable 3nm designs on Samsung process<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/news\/3nm-armv9-physical-ip\">3nm physical IP tapes out for ARMv9 designs<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/news\/synopsys-ports-moortec-pvt-sensor-3nm\">Synopsys moves Moortec PVT sensor to 3nm<\/a><\/li>\n<li>\n<hr \/>\n<p>&nbsp;<\/p>\n<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>Le tapeout d&rsquo;un SoC multi-sous-syst\u00e8me utilise la plate-forme de conception Synopsys Fusion pour une fabrication avec la technologie de transistor GAA (Gate-all-all-around) 3 nm de la fonderie Samsung Foundry<\/p>\n","protected":false},"author":7,"featured_media":8792,"comment_status":"open","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[883],"tags":[920,899,906],"domains":[47],"ppma_author":[1139],"class_list":["post-8791","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technologies","tag-artificialintelligence-fr","tag-eda-cad-tools-fr","tag-mpus-mcus-fr","domains-electronique-eci"],"acf":[],"yoast_head":"<title>La fonderie Samsung Foundry finalise le tapeout d&#039;une puce 3nm ...<\/title>\n<meta name=\"description\" content=\"Le tapeout d&#039;un SoC multi-sous-syst\u00e8me utilise la plate-forme de conception Synopsys Fusion pour une fabrication avec la technologie de transistor GAA...\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/8791\/\" \/>\n<meta property=\"og:locale\" content=\"fr_FR\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"La fonderie Samsung Foundry finalise le tapeout d&#039;une puce 3nm GAA\" \/>\n<meta property=\"og:description\" content=\"Le tapeout d&#039;un SoC multi-sous-syst\u00e8me utilise la plate-forme de conception Synopsys Fusion pour une fabrication avec la technologie de transistor GAA (Gate-all-all-around) 3 nm de la fonderie Samsung Foundry\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/8791\/\" \/>\n<meta property=\"og:site_name\" content=\"EENewsEurope\" \/>\n<meta property=\"article:published_time\" content=\"2021-06-30T16:24:03+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.eenewseurope.com\/wp-content\/uploads\/import\/default\/files\/sites\/default\/files\/images\/samsung-3nm-gaa-image.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"1019\" \/>\n\t<meta property=\"og:image:height\" content=\"303\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"Wisse Hettinga\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Wisse Hettinga\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"3 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#article\",\"isPartOf\":{\"@id\":\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/\"},\"author\":{\"name\":\"Wisse Hettinga\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/c6b626c6c65f5e1e7794ce2d17b2ca82\"},\"headline\":\"La fonderie Samsung Foundry finalise le tapeout d&rsquo;une puce 3nm GAA\",\"datePublished\":\"2021-06-30T16:24:03+00:00\",\"dateModified\":\"2021-06-30T16:24:03+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/\"},\"wordCount\":721,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#organization\"},\"keywords\":[\"ArtificialIntelligence\",\"EDA &amp; CAD tools\",\"MPUs\/MCUs\"],\"articleSection\":[\"Technologies\"],\"inLanguage\":\"fr-FR\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#respond\"]}]},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/\",\"url\":\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/\",\"name\":\"La fonderie Samsung Foundry finalise le tapeout d'une puce 3nm GAA -\",\"isPartOf\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#website\"},\"datePublished\":\"2021-06-30T16:24:03+00:00\",\"dateModified\":\"2021-06-30T16:24:03+00:00\",\"breadcrumb\":{\"@id\":\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#breadcrumb\"},\"inLanguage\":\"fr-FR\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/\"]}]},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\/\/www.ecinews.fr\/fr\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"La fonderie Samsung Foundry finalise le tapeout d&rsquo;une puce 3nm GAA\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#website\",\"url\":\"https:\/\/www.ecinews.fr\/fr\/\",\"name\":\"EENewsEurope\",\"description\":\"Just another WordPress site\",\"publisher\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\/\/www.ecinews.fr\/fr\/?s={search_term_string}\"},\"query-input\":\"required name=search_term_string\"}],\"inLanguage\":\"fr-FR\"},{\"@type\":\"Organization\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#organization\",\"name\":\"EENewsEurope\",\"url\":\"https:\/\/www.ecinews.fr\/fr\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"fr-FR\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/\",\"url\":\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg\",\"contentUrl\":\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg\",\"width\":283,\"height\":113,\"caption\":\"EENewsEurope\"},\"image\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/\"}},{\"@type\":\"Person\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/c6b626c6c65f5e1e7794ce2d17b2ca82\",\"name\":\"Wisse Hettinga\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"fr-FR\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/image\/5dc5f564ca306d7cb8b22735be49a465\",\"url\":\"https:\/\/secure.gravatar.com\/avatar\/24a36fe68de56eac2a45cbaf9aa4bb58?s=96&d=mm&r=g\",\"contentUrl\":\"https:\/\/secure.gravatar.com\/avatar\/24a36fe68de56eac2a45cbaf9aa4bb58?s=96&d=mm&r=g\",\"caption\":\"Wisse Hettinga\"}}]}<\/script>","yoast_head_json":{"title":"La fonderie Samsung Foundry finalise le tapeout d'une puce 3nm ...","description":"Le tapeout d'un SoC multi-sous-syst\u00e8me utilise la plate-forme de conception Synopsys Fusion pour une fabrication avec la technologie de transistor GAA...","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/8791\/","og_locale":"fr_FR","og_type":"article","og_title":"La fonderie Samsung Foundry finalise le tapeout d'une puce 3nm GAA","og_description":"Le tapeout d'un SoC multi-sous-syst\u00e8me utilise la plate-forme de conception Synopsys Fusion pour une fabrication avec la technologie de transistor GAA (Gate-all-all-around) 3 nm de la fonderie Samsung Foundry","og_url":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/8791\/","og_site_name":"EENewsEurope","article_published_time":"2021-06-30T16:24:03+00:00","og_image":[{"width":1019,"height":303,"url":"https:\/\/www.eenewseurope.com\/wp-content\/uploads\/import\/default\/files\/sites\/default\/files\/images\/samsung-3nm-gaa-image.jpg","type":"image\/jpeg"}],"author":"Wisse Hettinga","twitter_card":"summary_large_image","twitter_misc":{"Written by":"Wisse Hettinga","Est. reading time":"3 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#article","isPartOf":{"@id":"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/"},"author":{"name":"Wisse Hettinga","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/c6b626c6c65f5e1e7794ce2d17b2ca82"},"headline":"La fonderie Samsung Foundry finalise le tapeout d&rsquo;une puce 3nm GAA","datePublished":"2021-06-30T16:24:03+00:00","dateModified":"2021-06-30T16:24:03+00:00","mainEntityOfPage":{"@id":"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/"},"wordCount":721,"commentCount":0,"publisher":{"@id":"https:\/\/www.ecinews.fr\/fr\/#organization"},"keywords":["ArtificialIntelligence","EDA &amp; CAD tools","MPUs\/MCUs"],"articleSection":["Technologies"],"inLanguage":"fr-FR","potentialAction":[{"@type":"CommentAction","name":"Comment","target":["https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#respond"]}]},{"@type":"WebPage","@id":"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/","url":"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/","name":"La fonderie Samsung Foundry finalise le tapeout d'une puce 3nm GAA -","isPartOf":{"@id":"https:\/\/www.ecinews.fr\/fr\/#website"},"datePublished":"2021-06-30T16:24:03+00:00","dateModified":"2021-06-30T16:24:03+00:00","breadcrumb":{"@id":"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#breadcrumb"},"inLanguage":"fr-FR","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/www.eenewseurope.com\/fr\/la-fonderie-samsung-foundry-finalise-le-tapeout-dune-puce-3nm-gaa\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.ecinews.fr\/fr\/"},{"@type":"ListItem","position":2,"name":"La fonderie Samsung Foundry finalise le tapeout d&rsquo;une puce 3nm GAA"}]},{"@type":"WebSite","@id":"https:\/\/www.ecinews.fr\/fr\/#website","url":"https:\/\/www.ecinews.fr\/fr\/","name":"EENewsEurope","description":"Just another WordPress site","publisher":{"@id":"https:\/\/www.ecinews.fr\/fr\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.ecinews.fr\/fr\/?s={search_term_string}"},"query-input":"required name=search_term_string"}],"inLanguage":"fr-FR"},{"@type":"Organization","@id":"https:\/\/www.ecinews.fr\/fr\/#organization","name":"EENewsEurope","url":"https:\/\/www.ecinews.fr\/fr\/","logo":{"@type":"ImageObject","inLanguage":"fr-FR","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/","url":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg","contentUrl":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg","width":283,"height":113,"caption":"EENewsEurope"},"image":{"@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/logo\/image\/"}},{"@type":"Person","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/c6b626c6c65f5e1e7794ce2d17b2ca82","name":"Wisse Hettinga","image":{"@type":"ImageObject","inLanguage":"fr-FR","@id":"https:\/\/www.ecinews.fr\/fr\/#\/schema\/person\/image\/5dc5f564ca306d7cb8b22735be49a465","url":"https:\/\/secure.gravatar.com\/avatar\/24a36fe68de56eac2a45cbaf9aa4bb58?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/24a36fe68de56eac2a45cbaf9aa4bb58?s=96&d=mm&r=g","caption":"Wisse Hettinga"}}]}},"authors":[{"term_id":1139,"user_id":7,"is_guest":0,"slug":"wisse-hettinga","display_name":"Wisse Hettinga","avatar_url":"https:\/\/secure.gravatar.com\/avatar\/24a36fe68de56eac2a45cbaf9aa4bb58?s=96&d=mm&r=g","0":null,"1":"","2":"","3":"","4":"","5":"","6":"","7":"","8":""}],"_links":{"self":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/8791"}],"collection":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/users\/7"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/comments?post=8791"}],"version-history":[{"count":0,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/8791\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/media\/8792"}],"wp:attachment":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/media?parent=8791"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/categories?post=8791"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/tags?post=8791"},{"taxonomy":"domains","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/domains?post=8791"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/ppma_author?post=8791"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}