{"id":73424,"date":"2019-10-14T15:16:39","date_gmt":"2019-10-14T15:16:39","guid":{"rendered":"https:\/\/\/arm-permet-des-instructions-personnalisees-sur-cortex-m\/"},"modified":"2019-10-14T15:16:39","modified_gmt":"2019-10-14T15:16:39","slug":"arm-permet-des-instructions-personnalisees-sur-cortex-m","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/arm-permet-des-instructions-personnalisees-sur-cortex-m\/","title":{"rendered":"ARM permet des instructions personnalis\u00e9es sur Cortex-M"},"content":{"rendered":"<p><span class=\"tlid-translation translation\" lang=\"fr\">Cette fonctionalit\u00e9 d&rsquo;instructions personnalis\u00e9es sera disponible pour le processeur ARM Cortex-M33 au premier semestre de 2020 sans co\u00fbt suppl\u00e9mentaire, et sur tous les futurs processeurs Cortex-M.<\/span><\/p>\n<p><span class=\"tlid-translation translation\" lang=\"fr\">Thomas Ensergueix, directeur principal responsable du secteur d&rsquo;activit\u00e9 IoT chez ARM, a d\u00e9clar\u00e9 que ce cette novelle possibilit\u00e9 devrait permettre aux clients de mieux aborder des applications comme l&rsquo;intelligence artificielles, la s\u00e9curit\u00e9, la 5G et des applications sp\u00e9cifiques de l&rsquo;IoT. La perspective de mille milliard de n\u0153uds IoT connect\u00e9s \u00e0 Internet produira une vari\u00e9t\u00e9 de cas d\u2019utilisation et de charges de travail en augmentation rapide, a ajout\u00e9 ARM.<\/span><\/p>\n<p><span class=\"tlid-translation translation\" lang=\"fr\">Ensergueix, a \u00e9galement d\u00e9clar\u00e9 que, \u00e0 terme, ARM esp\u00e9rait \u00e9largir l\u2019utilisation de la technique au-del\u00e0 de l\u2019architecture de classe M et probablement \u00e0 la classe R.<\/span><\/p>\n<p><span class=\"tlid-translation translation\" lang=\"fr\">Lorsqu&rsquo;on lui a demand\u00e9 si cette \u00e9volution \u00e9tait une r\u00e9ponse \u00e0 la capacit\u00e9 d&rsquo;instructions personnalis\u00e9es de l&rsquo;architecture hautement modulaire RISC-V, Ensergueix ne l&rsquo;a pas ni\u00e9. \u00ab\u00a0Nous offrons des options \u00e0 nos clients. Certains con\u00e7oivent d\u00e9j\u00e0 des coprocesseurs \u00e0 couplage \u00e9troit et nous permettons \u00e0 cette charge de travail de se d\u00e9placer au sein du processeur. C&rsquo;est une course et nous devons am\u00e9liorer notre jeu. Notre fa\u00e7on de le faire est \u00e0 faible risque pour les clients \u00ab\u00a0<\/span><\/p>\n<p><em><strong>\u00e0 suivre: Une union toujours plus \u00e9troite<\/strong><\/em><\/p>\n<p>&nbsp;<\/p>\n<hr \/>\n<p>&nbsp;<\/p>\n<p><span class=\"tlid-translation translation\" lang=\"fr\">Ensergueix a soulign\u00e9 que l&rsquo;utilisation d&rsquo;instructions personnalis\u00e9es constituait l&rsquo;extension d&rsquo;une tendance allant des processeurs connect\u00e9s au bus aux co-processeurs \u00e9troitement coupl\u00e9s. \u00ab\u00a0L&rsquo;architecture ARM devient un ch\u00e2ssis contenant des instructions\u00a0\u00bb, a-t-il d\u00e9clar\u00e9. Il a ajout\u00e9 que les instructions suppl\u00e9mentaires sont impl\u00e9ment\u00e9es dans une logique personnalis\u00e9e plut\u00f4t que dans le chemin de donn\u00e9es conventionnel, ce qui constitue un \u00e9l\u00e9ment cl\u00e9 pour pr\u00e9server l&rsquo;int\u00e9grit\u00e9 des outils \u00e9cosyst\u00e9miques &#8211; compilateurs, simulateurs de jeux d&rsquo;instructions et mod\u00e8les rapides &#8211; et pour emp\u00eacher la fragmentation des logiciels.<\/span><\/p>\n<p>&nbsp;<\/p>\n<p><img decoding=\"async\" alt=\"\" height=\"264\" data-src=\"https:\/\/eenews.cdnartwhere.eu\/sites\/default\/files\/images\/01-picture-library\/PeterClarke\/2019\/10\/armcustomb.jpg\" width=\"530\" src=\"data:image\/svg+xml;base64,PHN2ZyB3aWR0aD0iMSIgaGVpZ2h0PSIxIiB4bWxucz0iaHR0cDovL3d3dy53My5vcmcvMjAwMC9zdmciPjwvc3ZnPg==\" class=\"lazyload\" style=\"--smush-placeholder-width: 530px; --smush-placeholder-aspect-ratio: 530\/264;\" \/><\/p>\n<p><span class=\"tlid-translation translation\" lang=\"fr\"><strong>Les instructions personnalis\u00e9es sont trait\u00e9es comme un \u00e9l\u00e9ment ext\u00e9rieur au chemin de donn\u00e9es principal et du compilateur. Source: ARM<\/strong><\/p>\n<p>Les principaux partenaires d&rsquo;ARM dans l&rsquo;introduction d&rsquo;instructions personnalis\u00e9es incluent NXP, STMicroelectronics, Silicon Labs et IAR Systems.<\/span><\/p>\n<p>&nbsp;<\/p>\n<p><strong>Related links and articles: <\/strong><\/p>\n<p><a href=\"http:\/\/www.arm.com\">www.arm.com<\/a><\/p>\n<p><strong>News articles:<\/strong><\/p>\n<p><a href=\"https:\/\/www.eenewsanalog.com\/news\/omnivision-arm-pair-image-sensor-processor-automotive\">OmniVision, ARM pair image sensor, processor for automotive <\/a><\/p>\n<p><a href=\"https:\/\/www.eenewsanalog.com\/news\/risc-v-mcus-support-migration-away-arm\">RISC-V MCUs support migration away from ARM<\/a><\/p>\n<p><a href=\"https:\/\/www.eenewsanalog.com\/news\/arm-gets-rival-amd-licenses-graphics-ip-samsung\">ARM gets a rival as AMD licenses graphics IP to Samsung <\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>ARM Ltd le fournisseur de propri\u00e9t\u00e9 intellectuelle (IP) de processeurs permet \u00e0 ses licenci\u00e9s de g\u00e9n\u00e9rer leurs propres instructions personnalis\u00e9es dans l\u2019architecture ARMv8-M afin d\u2019acc\u00e9l\u00e9rer les applications et de les diff\u00e9rencier.<\/p>\n","protected":false},"author":22,"featured_media":73425,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[883],"tags":[899,919,908],"domains":[47],"ppma_author":[1149],"class_list":["post-73424","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technologies","tag-eda-cad-tools-fr","tag-iot-fr","tag-plds-fpgas-asics-fr","domains-electronique-eci"],"acf":[],"yoast_head":"<title>ARM permet des instructions personnalis\u00e9es sur Cortex-M ...<\/title>\n<meta name=\"description\" content=\"ARM Ltd le fournisseur de propri\u00e9t\u00e9 intellectuelle (IP) de processeurs permet \u00e0 ses licenci\u00e9s de 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