{"id":62290,"date":"2020-03-02T14:46:18","date_gmt":"2020-03-02T14:46:18","guid":{"rendered":"https:\/\/\/arm-ou-risc-v-pour-lepi-en-debat-a-paris-16-17-mars-2020\/"},"modified":"2020-03-02T14:46:18","modified_gmt":"2020-03-02T14:46:18","slug":"arm-ou-risc-v-pour-lepi-en-debat-a-paris-16-17-mars-2020","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/arm-ou-risc-v-pour-lepi-en-debat-a-paris-16-17-mars-2020\/","title":{"rendered":"ARM ou RISC-V pour l’EPI en d\u00e9bat \u00e0 Paris – 16-17 mars 2020"},"content":{"rendered":"

Des dirigeants d’ARM, de la Fondation RISC-V, de Hewlett-Packard Enterprises et de TSMC, entre autres, prendront la parole lors d’une conf\u00e9rence organis\u00e9e pour discuter de l’initiative EPI et des besoins europ\u00e9ens pour l’informatique exascale, l’acc\u00e9l\u00e9ration mat\u00e9rielle et l’informatique automobile.<\/span><\/p>\n

L’EPI <\/span>(European Processor Initiative), est un \u00e9l\u00e9ment cl\u00e9 de ce mandat, \u00e0 savoir, la n\u00e9cessit\u00e9 de cr\u00e9er des processeurs qui soutiendront l’ind\u00e9pendance strat\u00e9gique de l’Europe et sa position \u00e9conomique mondiale favorable dans l’informatique exascale.<\/span><\/p>\n

RISC-V est consid\u00e9r\u00e9 comme devant \u00eatre la base des solutions europ\u00e9ennes pour le mat\u00e9riel d’acc\u00e9l\u00e9ration et les applications automobiles tandis que l’architecture ARM Neoverse a \u00e9t\u00e9 choisie pour le calcul haute performance. Parall\u00e8lement, une start-up SiPearl a \u00e9t\u00e9 cr\u00e9\u00e9e pour concevoir les puces n\u00e9cessaires (voir SiPearl, Paris obtient \u20ac6.2m de l’Europe pour ses MPU exascale<\/a>).<\/span><\/p>\n

La premi\u00e8re journ\u00e9e comprendra une allocution de Brent Gorda, directeur principal du HPC ( High Power Computing ou Informatique exascale) chez ARM. La deuxi\u00e8me journ\u00e9e comprendra un discours d’ouverture de Calista Redmond, PDG de la Fondation RISC-V. ( voir interview de Calista Redmond: The world is big enough! – Calista Redmond, CEO RISC-V )<\/a><\/span><\/p>\n

\u00ab\u00a0Alors que la souverainet\u00e9 devient de plus en plus importante, EPI va jouer un r\u00f4le central dans le paysage HPC europ\u00e9en. Dans un premier temps, avec la conception du processeur RHEA, sur l’architecture ARM Neoverse de nouvelle g\u00e9n\u00e9ration, nous allons \u00e9quiper le supercalculateur exascale europ\u00e9en\u00a0\u00bb, a d\u00e9clar\u00e9 Jean-Marc Denis, pr\u00e9sident du PEV, dans un communiqu\u00e9. <\/span> Il a ajout\u00e9: \u00ab\u00a0Parall\u00e8lement, dans le cadre de notre strat\u00e9gie \u00e0 long terme, nous commen\u00e7ons \u00e0 jeter les bases de notre future bo\u00eete \u00e0 outils IP europ\u00e9enne bas\u00e9e sur une vari\u00e9t\u00e9 de solutions IP, y compris RISC-V, qui cibleront les acc\u00e9l\u00e9rateurs et microprocesseurs personnalis\u00e9s.\u00a0\u00bb<\/span><\/p>\n

Denis a ajout\u00e9 que SiPearl aura cr\u00e9\u00e9 et livr\u00e9 ses processeurs de premi\u00e8re g\u00e9n\u00e9ration en 2022.<\/p>\n

De plus amples informations sur la conf\u00e9rence sont disponibles sur le site Web de EPI dont le lien figure ci-dessous.<\/span><\/p>\n

Denis added that he expected SiPearl to have created first-generation processors and have them in the field in 2022.<\/p>\n

Further details of the conference can be found at EPI’s website linked below.<\/p>\n

Lire aussi:<\/strong><\/p>\n

SiPearl, Paris obtient \u20ac6.2m de l’Europe pour ses MPU exascale<\/a><\/span><\/p>\n

Kalray d\u00e9voile sa 3\u00e8me g\u00e9n\u00e9ration de Coolidge au CES<\/a><\/p>\n

Kalray partenaire et fournisseur d\u2019une technologie cl\u00e9 du processeur europ\u00e9en EPI <\/a><\/p>\n

eSOL et Kalray \u00e9tendent leur collaboration <\/a><\/p>\n

The world is big enough! – Calista Redmond, CEO RISC-V <\/a><\/span><\/p>\n

Related links and articles: <\/strong><\/p>\n

www.european-processor-initiative.eu<\/a><\/p>\n

News articles: <\/strong><\/p>\n

European processor startup gets \u20ac6.2 million kickstart grant<\/a><\/p>\n

GrAI Matter, Paris research gives rise to AI processor for the edge <\/a><\/p>\n

NXP, Kalray demo Coolidge parallel processor in ‘BlueBox’ <\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

Les architectures de processeur ARM et RISC-V seront toutes deux repr\u00e9sent\u00e9es au Forum europ\u00e9en de l’initiative des processeurs europ\u00e9ens (European Processor Initiative), une conf\u00e9rence de deux jours qui se tiendra le 16 et 17 mars 2020 \u00e0 Paris au centre de conf\u00e9rences Elys\u00e9es Biarritz, 22-24 rue Quentin Bauchart \u2013 Paris 75008 .<\/p>\n","protected":false},"author":22,"featured_media":62291,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[883],"tags":[889,920,893,891,894,896,899,919,905,906,908,916,917,915],"domains":[47],"ppma_author":[1149],"class_list":["post-62290","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technologies","tag-analog-fr","tag-artificialintelligence-fr","tag-authentication-encryption-fr","tag-automotive-fr","tag-boards-embedded-cards-fr","tag-digitalsignalprocessing-fr","tag-eda-cad-tools-fr","tag-iot-fr","tag-memory-data-storage-fr","tag-mpus-mcus-fr","tag-plds-fpgas-asics-fr","tag-rf-transmission-fr","tag-software-embedded-tools-fr","tag-wireless-communications-fr","domains-electronique-eci"],"acf":[],"yoast_head":"ARM ou RISC-V pour l'EPI en d\u00e9bat \u00e0 Paris - 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