{"id":478747,"date":"2025-04-30T08:41:47","date_gmt":"2025-04-30T06:41:47","guid":{"rendered":"https:\/\/www.ecinews.fr\/?p=478747"},"modified":"2025-04-30T08:41:47","modified_gmt":"2025-04-30T06:41:47","slug":"tsmc-renonce-a-la-lithographie-high-na-euv","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/tsmc-renonce-a-la-lithographie-high-na-euv\/","title":{"rendered":"TSMC renonce \u00e0 la lithographie high-NA EUV"},"content":{"rendered":"

Le fondeur TSMC n’a pas besoin d’utiliser des outils de lithographie \u00e0 ultraviolets extr\u00eames High-NA pour la fabrication de puces sur son process A14 (1,4 nm), selon les rapports du symposium technologique de TSMC en Am\u00e9rique du Nord.<\/h2>\n

L’entreprise a pr\u00e9sent\u00e9 le process A14 lors du symposium en pr\u00e9cisant qu’il devrait entrer en production en 2028. Il a d\u00e9j\u00e0 \u00e9t\u00e9 indiqu\u00e9 qu’un proc\u00e9d\u00e9 A16 devrait appara\u00eetre \u00e0 la fin de 2026 et qu’il ne n\u00e9cessiterait pas non plus d’outil High-NA EUVL.<\/p>\n

\u00ab\u00a0De 2 nm \u00e0 A14, nous n’avons pas besoin d’utiliser la technologie High-NA, mais nous pouvons continuer \u00e0 maintenir une complexit\u00e9 similaire en termes d’\u00e9tapes de traitement\u00a0\u00bb, aurait d\u00e9clar\u00e9 Kevin Zhang, vice-pr\u00e9sident senior du d\u00e9veloppement commercial, lors du lancement.<\/p>\n

Cette situation contraste avec celle d’Intel, qui s’est montr\u00e9e agressive dans l’adoption de la technologie High-NA dans le cadre d’un programme visant \u00e0 rattraper les leaders du march\u00e9 des fonderies de semi-conducteurs, TSMC et Samsung. Intel a \u00e9t\u00e9 la premi\u00e8re entreprise \u00e0 recevoir un outil EUVL high-NA et pr\u00e9voit de commencer \u00e0 fabriquer des puces avec EUVL high-NA avec son process de fabrication 18A en 2025.<\/p>\n

Tout est dans le prix<\/h4>\n

L’une des principales raisons du retard de TSMC dans l’adoption pourrait \u00eatre le prix tr\u00e8s \u00e9lev\u00e9 des outils fix\u00e9 par le fournisseur monopolistique ASML Holding NV. Le prix de la machine d’exposition High-NA EUV serait d’environ 380 millions de dollars, soit plus du double des 180 millions de dollars environ des machines EUV \u00e0 faible NA de la g\u00e9n\u00e9ration pr\u00e9c\u00e9dente.<\/p>\n

TSMC a apparemment calcul\u00e9 qu’il \u00e9tait plus rentable d’utiliser le patterning multiple en utilisant l’EUVL \u00e0 faible NA et d’avoir des temps d’attente en ligne de production l\u00e9g\u00e8rement plus longs. En outre, elle b\u00e9n\u00e9ficiera de rendements sup\u00e9rieurs bien \u00e9tablis en utilisant la g\u00e9n\u00e9ration actuelle d’\u00e9quipements.<\/p>\n

Il reste \u00e9galement \u00e0 voir si Intel s’en tiendra \u00e0 son engagement agressif en faveur de la technologie, \u00e9tant donn\u00e9 qu’elle a maintenant un nouveau PDG – Lip-Bu Tan – dont les plans pour Intel Foundry n’ont pas encore \u00e9t\u00e9 enti\u00e8rement d\u00e9voil\u00e9s.<\/p>\n

Intel contre TSMC<\/h4>\n

Il a \u00e9galement \u00e9t\u00e9 rapport\u00e9 qu’Intel et TSMC ont conclu un accord pr\u00e9liminaire en vue de former une entreprise commune pour g\u00e9rer les usines de fabrication de puces d’Intel.<\/p>\n

M. Tan a d\u00e9clar\u00e9 aux analystes qu’il avait r\u00e9cemment rencontr\u00e9 CC Wei, le PDG de TSMC, et Morris Chang, le fondateur et ancien pr\u00e9sident de TSMC. \u00ab\u00a0Morris et CC sont des amis de longue date. Nous nous sommes \u00e9galement rencontr\u00e9s r\u00e9cemment (pour) essayer de trouver des domaines dans lesquels nous pouvons collaborer et cr\u00e9er une situation gagnant-gagnant\u00a0\u00bb, a d\u00e9clar\u00e9 M. Tan lors d’une conf\u00e9rence t\u00e9l\u00e9phonique avec des analystes.<\/p>\n

La premi\u00e8re version du process de fabrication A14 de TSMC n’utilise pas de distribution d’\u00e9nergie \u00e0 l’arri\u00e8re. Une variante appel\u00e9e A14P avec distribution de puissance dorsale, pr\u00e9vue pour 2029, et une version ult\u00e9rieure \u00e0 haute performance – A14X – pourraient \u00eatre des candidats pour la technologie High-NA EUVL.<\/p>\n

M\u00eame si Intel et Samsung poursuivent l’adoption de la technologie High-NA EUVL afin de rattraper TSMC dans les processus de pointe, ils devront faire face \u00e0 des co\u00fbts de d\u00e9veloppement. En faisant \u0153uvre de pionnier dans ce domaine, ils pourraient ouvrir la voie \u00e0 TSMC et lui permettre d’utiliser la technologie EUVL \u00e0 haute teneur en azote lorsqu’elle estimera que l’adoption est rentable.<\/p>\n

Liens et articles connexes :<\/h4>\n

www.tsmc.com<\/a><\/p>\n

www.intel.com<\/a><\/p>\n

Articles de presse :<\/h4>\n

Intel et TSMC envisagent de cr\u00e9er une entreprise de fabrication de puces, selon un rapport<\/a><\/p>\n

ASML a commenc\u00e9 \u00e0 livrer une deuxi\u00e8me machine de lithographie EUV \u00e0 haute intensit\u00e9 d’azote <\/a><\/p>\n

ASML enregistre un chiffre d’affaires record en d\u00e9pit de l’abandon des usines de fabrication de plaquettes de silicium<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

Le fondeur TSMC n’a pas besoin d’utiliser des outils de lithographie \u00e0 ultraviolets extr\u00eames High-NA pour la fabrication de puces sur son process A14 (1,4 nm), selon les rapports du symposium technologique de TSMC en Am\u00e9rique du Nord. L’entreprise a pr\u00e9sent\u00e9 le process A14 lors du symposium en pr\u00e9cisant qu’il devrait entrer en production en […]<\/p>\n","protected":false},"author":40,"featured_media":478707,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[883],"tags":[9642,8015,2541],"domains":[47],"ppma_author":[3631,6199],"class_list":["post-478747","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technologies","tag-high-na-euv","tag-lithographie-euv","tag-tsmc","domains-electronique-eci"],"acf":[],"yoast_head":"TSMC renonce \u00e0 la lithographie EUV \u00e0 haute intensit\u00e9 d'azote ...<\/title>\n<meta name=\"description\" content=\"TSMC n'a pas besoin d'utiliser des outils de lithographie High-NA EUV pour la fabrication de puces sur son proc\u00e9d\u00e9 A14 (1,4 nm).\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, 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