{"id":47286,"date":"2020-08-21T15:55:03","date_gmt":"2020-08-21T15:55:03","guid":{"rendered":"https:\/\/\/dispositifs-coaxpress-2-0-pour-accelerer-lacquisition-dimages\/"},"modified":"2020-08-21T15:55:03","modified_gmt":"2020-08-21T15:55:03","slug":"dispositifs-coaxpress-2-0-pour-accelerer-lacquisition-dimages","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/dispositifs-coaxpress-2-0-pour-accelerer-lacquisition-dimages\/","title":{"rendered":"Dispositifs CoaXPress 2.0 pour acc\u00e9l\u00e9rer l\u2019acquisition d&rsquo;images"},"content":{"rendered":"<p>Microchip Technology a franchi une nouvelle \u00e9tape avec CoaXPress (CXP) en usine. Les premi\u00e8res interfaces de couche physique monopuce int\u00e9grant des fonctions permettent de simplifier la conception des syst\u00e8mes de vision industrielle, de maximiser la vitesse de transmission, et de faciliter le d\u00e9ploiement au sein d&rsquo;op\u00e9rations d&#8217;embouteillage, d&rsquo;inspection alimentaire ou industrielle, et d&rsquo;applications d&rsquo;imagerie \u00e0 tr\u00e8s haute cadence.<\/p>\n<p>La famille <a href=\"https:\/\/www.microchip.com\/design-centers\/data-and-video-transceivers\/protocols\/coaxpress\">EQCO125X40 de dispositifs CoaXPress<\/a> est la premi\u00e8re \u00e0 mettre en \u0153uvre la norme CXP 2.0, en partant d&rsquo;une nouvelle conception r\u00e9tro-compatible s\u2019appuyant sur la nouvelle sp\u00e9cification. Ces dispositifs int\u00e8grent \u00e0 la fois un m\u00e9canisme de r\u00e9cup\u00e9ration de donn\u00e9es d&rsquo;horloge (CDR) fonctionnant \u00e0 toutes les vitesses, et une horloge c\u00f4t\u00e9 cam\u00e9ra, pour pouvoir r\u00e9pondre aux besoins des environnements r\u00e9els. Ces dispositifs augmentent consid\u00e9rablement le d\u00e9bit de traitement des syst\u00e8mes de vision artificielle en permettant aux cam\u00e9ras et aux cartes d&rsquo;acquisition de transmettre les donn\u00e9es quatre \u00e0 huit fois plus vite qu&rsquo;avec d&rsquo;autres solutions. En outre, ces dispositifs permettent de multiplier par 4 la longueur du c\u00e2ble de liaison, malgr\u00e9 une consommation beaucoup plus faible et une latence quasi nulle.<\/p>\n<hr \/>\n<p>Cette famille de produits \u00e9largit \u00e9galement les tol\u00e9rances et am\u00e9liore la souplesse de conception, en se verrouillant de mani\u00e8re transparente sur toutes les fr\u00e9quences, quel que soit le d\u00e9bit, de CXP-1 \u00e0 CXP-12, et en \u00e9vitant d\u2019avoir recours \u00e0 plusieurs canaux gr\u00e2ce \u00e0 une bande passante de 12,5 Gbits\/s sur un seul c\u00e2ble. Des options de c\u00e2blage plus larges permettent d&rsquo;installer les syst\u00e8mes \u00e0 l&rsquo;endroit voulu, tandis que le m\u00e9canisme CDR int\u00e9gr\u00e9 r\u00e9duit le jitter entre la cam\u00e9ra \u00e0 la carte d&rsquo;acquisition. Le CDR basse-fr\u00e9quence int\u00e9gr\u00e9 \u00e0 la cam\u00e9ra \u00e9vite d&rsquo;avoir \u00e0 programmer une horloge s\u00e9par\u00e9e dans le FPGA. Le m\u00e9canisme de test d&rsquo;int\u00e9grit\u00e9 des signaux de liaison qui est incorpor\u00e9 aux dispositifs permet au syst\u00e8me d&rsquo;effectuer des contr\u00f4les en temps r\u00e9el de l&rsquo;int\u00e9grit\u00e9 des liaisons par c\u00e2ble, \u00e0 la fois avant et pendant le fonctionnement.<\/p>\n<p>Pour les fabricants de cartes, cette nouvelle offre Microchip permet de d\u00e9velopper plus facilement et \u00e0 moindre co\u00fbt des produits plus robustes, que les utilisateurs peuvent d\u00e9ployer partout sur la ligne de production. Ces produits permettent de tester la qualit\u00e9 des liaisons c\u00e2bl\u00e9es lors de leur installation et de leur utilisation en temps r\u00e9el, offrant ainsi aux utilisateurs des solutions plus robustes et plus compl\u00e8tes \u00e0 leurs besoins. Il est aussi possible de monter jusqu&rsquo;\u00e0 50 Gbits\/s sur plusieurs c\u00e2bles.<\/p>\n<p>Sch\u00e9ma fonctionnel : <a href=\"https:\/\/www.flickr.com\/photos\/microchiptechnology\/50225861748\/in\/dateposted\/\">https:\/\/www.flickr.com\/photos\/microchiptechnology\/50225861748\/in\/dateposted\/<\/a><\/p>\n<p><a href=\"http:\/\/www.microchip.com\">www.microchip.com<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Jusqu&rsquo;\u00e0 la ratification l&rsquo;an pass\u00e9 de la norme d&rsquo;interface CoaXPress 2.0 \u00e0 12,5\u00a0Gbits\/s, les solutions d\u2019acquisition d&rsquo;images par les syst\u00e8mes de vision industrielle avaient supplant\u00e9 les convoyeurs \u00e0 bande comme frein principal \u00e0 l&rsquo;acc\u00e9l\u00e9ration des lignes de production.<\/p>\n","protected":false},"author":11,"featured_media":47287,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[],"tags":[],"domains":[47],"ppma_author":[1143],"class_list":["post-47286","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","domains-electronique-eci"],"acf":[],"yoast_head":"<title>Dispositifs CoaXPress 2.0 pour acc\u00e9l\u00e9rer l\u2019acquisition d&#039;im...<\/title>\n<meta name=\"description\" content=\"Jusqu&#039;\u00e0 la ratification l&#039;an pass\u00e9 de la norme d&#039;interface CoaXPress 2.0 \u00e0 12,5\u00a0Gbits\/s, les solutions d\u2019acquisition d&#039;images par les syst\u00e8mes de...\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/47286\/\" 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