Deal cr\u00e9e le premier syst\u00e8me de lithographie par nanoimpression avec impression \u00e0 jet d’encre<\/a><\/li>\n<\/ul>\nLe syst\u00e8me de lib\u00e9ration par transfert de couche EVG850 NanoCleave est la premi\u00e8re plate-forme \u00e0 utiliser la technologie NanoCleave d’EVG pour la lib\u00e9ration avec une pr\u00e9cision nanom\u00e9trique de couches coll\u00e9es, d\u00e9pos\u00e9es ou cultiv\u00e9es sur des substrats de support en silicium. Le syst\u00e8me utilise un laser infrarouge (IR) coupl\u00e9 \u00e0 des mat\u00e9riaux de lib\u00e9ration inorganiques sp\u00e9cialement formul\u00e9s dans une plate-forme \u00e9prouv\u00e9e, capable de fabriquer des volumes importants.<\/p>\n
Par cons\u00e9quent, l’EVG850 NanoCleave \u00e9limine le besoin de supports en verre, permettant l’empilage de chiplets ultra-minces pour un packaging avanc\u00e9, ainsi que l’empilage de couches 3D ultra-minces pour le traitement frontal, y compris la logique avanc\u00e9e, la m\u00e9moire et la formation de composants de puissance, afin de soutenir les futures feuilles de route d’int\u00e9gration 3D.<\/p>\n
Les premiers syst\u00e8mes EVG850 NanoCleave ont d\u00e9j\u00e0 \u00e9t\u00e9 install\u00e9s chez des clients, et pr\u00e8s de deux douzaines de d\u00e9monstrations de produits sont en cours avec des clients et des partenaires sur des sites clients et au si\u00e8ge d’EVG.<\/p>\n
L’utilisation de supports en silicium avec des couches de s\u00e9paration inorganiques permet d’\u00e9viter ces probl\u00e8mes de temp\u00e9rature et de compatibilit\u00e9 avec les supports en verre. En outre, la pr\u00e9cision nanom\u00e9trique du clivage par laser IR permet de traiter des plaquettes extr\u00eamement fines sans modifier les processus d’enregistrement. L’empilement ult\u00e9rieur de ces couches minces de composants permet de r\u00e9aliser des interconnexions \u00e0 plus grande largeur de bande et offre de nouvelles possibilit\u00e9s de conception et de segmentation des matrices pour les dispositifs haute performance de la prochaine g\u00e9n\u00e9ration.<\/p>\n
Dans le m\u00eame temps, les feuilles de route des transistors pour le n\u0153ud inf\u00e9rieur \u00e0 3 nm exigent de nouvelles architectures et des innovations en mati\u00e8re de conception, telles que des rails d’alimentation enfouis, des r\u00e9seaux de distribution d’\u00e9nergie \u00e0 l’arri\u00e8re, des transistors \u00e0 effet de champ compl\u00e9mentaires (CFET) et des canaux atomiques 2D, qui n\u00e9cessitent tous un transfert de couches de mat\u00e9riaux extr\u00eamement minces.<\/p>\n
Les supports en silicium et les couches de s\u00e9paration inorganiques r\u00e9pondent aux exigences de propret\u00e9 des processus, de compatibilit\u00e9 des mat\u00e9riaux et de temp\u00e9ratures de traitement \u00e9lev\u00e9es pour les flux de fabrication frontaux. Cependant, jusqu’\u00e0 pr\u00e9sent, les supports de silicium devaient \u00eatre compl\u00e8tement \u00e9limin\u00e9s par des processus de meulage, de polissage et de gravure, ce qui entra\u00eenait des variations de l’ordre du micron sur la surface de la couche de travail du composant, rendant cette m\u00e9thode inadapt\u00e9e \u00e0 l’empilement de couches minces \u00e0 des n\u0153uds avanc\u00e9s.<\/p>\n
La compatibilit\u00e9 \u00e0 haute temp\u00e9rature (jusqu’\u00e0 1000 \u00b0C) de l’EVG850 NanoCleave permet un traitement frontal, tandis que l’\u00e9tape de clivage IR \u00e0 temp\u00e9rature ambiante garantit l’int\u00e9grit\u00e9 de la couche du composant et du substrat porteur. Le processus de transfert de couches \u00e9limine \u00e9galement la n\u00e9cessit\u00e9 d’utiliser des solvants co\u00fbteux associ\u00e9s au meulage, au polissage et \u00e0 la gravure des plaquettes de support.<\/p>\n
L’EVG850 NanoCleave est bas\u00e9 sur la m\u00eame plate-forme que la s\u00e9rie EVG850 d’EVG, leader de l’industrie, de syst\u00e8mes automatis\u00e9s de collage\/d\u00e9collage temporaire et de collage de silicium sur isolant (SOI), avec une conception compacte et un syst\u00e8me de manipulation des wafers \u00e9prouv\u00e9 par HVM.<\/p>\n
\u00ab\u00a0R\u00e9cemment, l’int\u00e9gration 3D et l’int\u00e9gration h\u00e9t\u00e9rog\u00e8ne se sont impos\u00e9es comme les principaux facteurs d’am\u00e9lioration des performances des nouvelles g\u00e9n\u00e9rations de semiconducteurs. Cette \u00e9volution a fait du collage des tranches de silicium un processus essentiel pour la poursuite de la mise \u00e0 l’\u00e9chelle PPACt (puissance, performance, surface, co\u00fbt et d\u00e9lai de mise sur le march\u00e9)\u00a0\u00bb, a d\u00e9clar\u00e9 le Dr Bernd Thallner, chef de projet R&D au sein du groupe EVG.<\/p>\n
\u00ab\u00a0Avec son syst\u00e8me EVG850 NanoCleave, EVG a fusionn\u00e9 les avantages du collage temporaire et du collage par fusion en une seule plate-forme polyvalente qui permet \u00e0 nos clients d’\u00e9tendre leurs futures feuilles de route dans les domaines de l’emballage avanc\u00e9 et de la conception et de la fabrication de transistors \u00e0 l’\u00e9chelle de la prochaine g\u00e9n\u00e9ration.\u00a0\u00bb<\/p>\n
www.evgroup.com\/products\/bonding\/temporary-bonding-and-debonding-systems\/evg850-nanocleave<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"EVG en Autriche a lanc\u00e9 le premier syst\u00e8me de lib\u00e9ration de couches pour la fabrication en grande quantit\u00e9 de chiplets et de processus sub-3nm. Le transfert de couches est une technologie cl\u00e9 pour l’assemblage de syst\u00e8mes de puces d\u00e9sagr\u00e9g\u00e9es et pour les processus de fabrication de puces de pointe. Auparavant, il fallait utiliser des supports […]<\/p>\n","protected":false},"author":34,"featured_media":438884,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[883],"tags":[2159,3301,4166],"domains":[47],"ppma_author":[1153,3640],"class_list":["post-438943","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technologies","tag-2nm","tag-chiplets-fr","tag-packaging-fr","domains-electronique-eci"],"acf":[],"yoast_head":"
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