{"id":434121,"date":"2023-10-09T17:03:43","date_gmt":"2023-10-09T15:03:43","guid":{"rendered":"https:\/\/www.eenewseurope.com\/?p=434121"},"modified":"2023-10-09T18:02:12","modified_gmt":"2023-10-09T16:02:12","slug":"tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/","title":{"rendered":"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D"},"content":{"rendered":"<h3><span style=\"font-size: 16px;\">TSMC cherche \u00e0 d\u00e9velopper un format de donn\u00e9es standard pour les conceptions de chiplets qui serait utilis\u00e9 par tous les fournisseurs d&rsquo;outils de conception, d&rsquo;assemblage et de test de l&rsquo;EDA.<\/span><\/h3>\n<p>Cette initiative s&rsquo;inscrit dans le cadre de l&rsquo;adoption de la technologie 3D Blox pour la conception de chiplets sur le processus CoWoS de TSMC. L&rsquo;objectif est de fournir des donn\u00e9es communes pour les chiplets provenant de diff\u00e9rents fournisseurs de silicium, de fabricants de substrats et de circuits imprim\u00e9s et des soci\u00e9t\u00e9s d&rsquo;assemblage et de test de l&rsquo;OSAT.<\/p>\n<p>\u00ab\u00a0Aujourd&rsquo;hui, la plupart des puces, \u00e0 l&rsquo;exception des m\u00e9moires, proviennent de TSMC, mais l&rsquo;objectif est de les m\u00e9langer et de les assortir, ce qui n&rsquo;est pas encore le cas, mais nous essayons d&rsquo;y parvenir\u00a0\u00bb, a d\u00e9clar\u00e9 Dan Kochpatcharin, responsable de l&rsquo;infrastructure de conception chez TSMC.<\/p>\n<p>\u00ab\u00a0Nous avons pass\u00e9 l&rsquo;ann\u00e9e derni\u00e8re \u00e0 travailler avec eux pour les aider \u00e0 comprendre que la collaboration est n\u00e9cessaire \u00e0 la r\u00e9alisation de l&rsquo;IC 3D\u00a0\u00bb, a-t-il d\u00e9clar\u00e9. \u00ab\u00a0Nous avons besoin que les fabricants de substrats et de circuits imprim\u00e9s se parlent pour cr\u00e9er un fichier de substrat qui puisse \u00eatre lu par tous les fournisseurs d&rsquo;EDA &#8211; nous y travaillons et nous en sommes \u00e0 80 %\u00a0\u00bb, a-t-il d\u00e9clar\u00e9. \u00ab\u00a0L&rsquo;OSAT s&rsquo;occupe \u00e9galement de l&rsquo;acheminement du substrat et nous devons donc nous assurer qu&rsquo;ils utilisent les m\u00eames outils. L&rsquo;int\u00e9gration de tout cela change la donne\u00a0\u00bb.<\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/synopsys-cadence-expand-3d-blox-2-0-support-for-chiplet-designs\/\">Synopsys et Cadence \u00e9tendent la prise en charge de 3D Blox 2.0 aux conceptions chiplet<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/keysight-joins-tsmc-alliance-to-drive-3d-ic-ecosystem\/\">Keysight rejoint l&rsquo;alliance TSMC pour stimuler l&rsquo;\u00e9cosyst\u00e8me des circuits int\u00e9gr\u00e9s 3D<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/unified-3nm-chiplet-platform-with-ucie-ip\/\">Plate-forme unifi\u00e9e de chiplets \u00e0 3 nm avec UCIe IP<\/a><\/li>\n<\/ul>\n<p>La derni\u00e8re version du protocole 3D Blox est d\u00e9j\u00e0 utilis\u00e9e par Synopsys et Cadence. Les outils PCB XSI\/XPD de Siemens EDA et Ansys le prennent en charge pour l&rsquo;analyse et la conception de PCB et de substrats.<\/p>\n<p>\u00ab\u00a0Nous avons donc mis le texte en ligne et dit aux partenaires de l&rsquo;AED qu&rsquo;ils pouvaient le communiquer \u00e0 n&rsquo;importe qui\u00a0\u00bb, a-t-il d\u00e9clar\u00e9. \u00ab\u00a0Nous voulions un moyen unique de modulariser ce syst\u00e8me, de la connectivit\u00e9 au c\u00e2blage et \u00e0 l&#8217;empilage. La faisabilit\u00e9 doit \u00eatre pr\u00e9coce &#8211; lorsque vous avez 10 millions de bumps bosses, il est important de savoir comment elles s&rsquo;alignent, car les outils pour circuits imprim\u00e9s ne g\u00e8rent pas des millions de bumps\u00a0\u00bb.<\/p>\n<p>La version 2.0 ajoute les matrices empil\u00e9es aux outils de d\u00e9tourage. \u00ab\u00a0Il ne s&rsquo;agit pas seulement d&rsquo;un empilement physique, mais aussi d&rsquo;une multitude d&rsquo;aspects multi-physiques, avec diff\u00e9rentes dilatations thermiques et de puissance, et ce n&rsquo;est pas si simple avec les vias de silicium traversants et les diff\u00e9rents choix d&rsquo;intercalaires\u00a0\u00bb, a-t-il d\u00e9clar\u00e9.<\/p>\n<p>La prochaine \u00e9tape consistera \u00e0 mettre au point un format unique pour tester les substrats. Ceci est important car la taille du substrat passera de la technologie actuelle du processus COWoS-S, qui est 3,5 fois la taille du plus grand r\u00e9ticule, \u00e0 CoWoS -R et -L, qui sera jusqu&rsquo;\u00e0 6 fois la taille du r\u00e9ticule (13 x 13 cm). \u00ab\u00a0Vous avez toujours besoin de quelque chose entre les deux, mais cela ne saurait tarder\u00a0\u00bb, a-t-il d\u00e9clar\u00e9.<\/p>\n<p>Un format unique pour les tests est \u00e9galement n\u00e9cessaire.<\/p>\n<p>\u00ab\u00a0Il faut un format unique pour les testeurs et les outils DFT, de sorte que nous puissions faciliter le test pour un testeur, les emplacements de sondage des broches. La m\u00e9thodologie est alors du c\u00f4t\u00e9 du client\u00a0\u00bb, a-t-il d\u00e9clar\u00e9.<\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/siemens-eda-spil-team-on-fanout-chiplets\/\">Siemens EDA et SPIL s&rsquo;associent pour d\u00e9velopper des chiplets en \u00e9ventail<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/siemens-and-ase-extend-3d-packaging\/\">Siemens et ASE prolongent leur accord sur l&#8217;emballage 3D<\/a><\/li>\n<\/ul>\n<p>TSMC collabore avec ASE et SPIL dans le cadre de la plateforme d&rsquo;innovation ouverte (OIP) afin de poursuivre le d\u00e9veloppement de la technologie des circuits int\u00e9gr\u00e9s en 3D et travaille sur des projets de chiplets automobiles. \u00ab\u00a0Nous avons pr\u00e8s de 100 partenaires dans l&rsquo;OIP\u00a0\u00bb, a-t-il d\u00e9clar\u00e9. \u00ab\u00a0Nous n&rsquo;acceptons pas n&rsquo;importe qui &#8211; s&rsquo;ils nous rejoignent, nous nous assurons qu&rsquo;ils respectent le calendrier de la technologie afin qu&rsquo;elle soit pr\u00eate pour le client\u00a0\u00bb.<\/p>\n<p><a href=\"http:\/\/www.tsmc.com\">www.tsmc.com<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>TSMC cherche \u00e0 d\u00e9velopper un format de donn\u00e9es standard pour les conceptions de chiplets qui serait utilis\u00e9 par tous les fournisseurs d&rsquo;outils de conception, d&rsquo;assemblage et de test de l&rsquo;EDA. Cette initiative s&rsquo;inscrit dans le cadre de l&rsquo;adoption de la technologie 3D Blox pour la conception de chiplets sur le processus CoWoS de TSMC. L&rsquo;objectif [&hellip;]<\/p>\n","protected":false},"author":34,"featured_media":434039,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[883],"tags":[4857,1558],"domains":[47],"ppma_author":[3640,1153],"class_list":["post-434121","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technologies","tag-circuits-3d","tag-semiconducteurs","domains-electronique-eci"],"acf":[],"yoast_head":"<title>TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D ...<\/title>\n<meta name=\"description\" content=\"TSMC cherche \u00e0 d\u00e9velopper un format de donn\u00e9es standard pour les conceptions de chiplets pour tous les outils de conception EDA.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" 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Delapalisse\",\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#\/schema\/person\/0aa2cfb0bd8949724a68cbac8d8321b4\"},\"headline\":\"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D\",\"datePublished\":\"2023-10-09T15:03:43+00:00\",\"dateModified\":\"2023-10-09T16:02:12+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/\"},\"wordCount\":728,\"publisher\":{\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#organization\"},\"keywords\":[\"Circuits 3D\",\"Semiconducteurs\"],\"articleSection\":[\"Technologies\"],\"inLanguage\":\"fr-FR\"},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/\",\"url\":\"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/\",\"name\":\"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D 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protocoles de chiplets 3D\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#website\",\"url\":\"https:\/\/www.eenewseurope.com\/en\/\",\"name\":\"EENewsEurope\",\"description\":\"Just another WordPress site\",\"publisher\":{\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\/\/www.eenewseurope.com\/en\/?s={search_term_string}\"},\"query-input\":\"required name=search_term_string\"}],\"inLanguage\":\"fr-FR\"},{\"@type\":\"Organization\",\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#organization\",\"name\":\"EENewsEurope\",\"url\":\"https:\/\/www.eenewseurope.com\/en\/\",\"logo\":{\"@type\":\"ImageObject\",\"inLanguage\":\"fr-FR\",\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#\/schema\/logo\/image\/\",\"url\":\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg\",\"contentUrl\":\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg\",\"width\":283,\"height\":113,\"caption\":\"EENewsEurope\"},\"image\":{\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#\/schema\/logo\/image\/\"}},{\"@type\":\"Person\",\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#\/schema\/person\/0aa2cfb0bd8949724a68cbac8d8321b4\",\"name\":\"A Delapalisse\",\"image\":{\"@type\":\"ImageObject\",\"inLanguage\":\"fr-FR\",\"@id\":\"https:\/\/www.eenewseurope.com\/en\/#\/schema\/person\/image\/211ac42237c2e9683c0964086c393cb4\",\"url\":\"https:\/\/secure.gravatar.com\/avatar\/ad45a8c5da24bc9c7c4940dd1c48a695?s=96&d=mm&r=g\",\"contentUrl\":\"https:\/\/secure.gravatar.com\/avatar\/ad45a8c5da24bc9c7c4940dd1c48a695?s=96&d=mm&r=g\",\"caption\":\"A Delapalisse\"},\"sameAs\":[\"http:\/\/ECI\"]}]}<\/script>","yoast_head_json":{"title":"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D ...","description":"TSMC cherche \u00e0 d\u00e9velopper un format de donn\u00e9es standard pour les conceptions de chiplets pour tous les outils de conception EDA.","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/434121\/","og_locale":"fr_FR","og_type":"article","og_title":"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D","og_description":"TSMC cherche \u00e0 d\u00e9velopper un format de donn\u00e9es standard pour les conceptions de chiplets pour tous les outils de conception EDA.","og_url":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/434121\/","og_site_name":"EENewsEurope","article_published_time":"2023-10-09T15:03:43+00:00","article_modified_time":"2023-10-09T16:02:12+00:00","og_image":[{"width":720,"height":1080,"url":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2023\/10\/Dan_Kochpatcharin_TSMC-scaled.jpg","type":"image\/jpeg"}],"author":"Nick Flaherty, A Delapalisse","twitter_card":"summary_large_image","twitter_misc":{"Written by":"A Delapalisse","Est. reading time":"3 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/#article","isPartOf":{"@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/"},"author":{"name":"A Delapalisse","@id":"https:\/\/www.eenewseurope.com\/en\/#\/schema\/person\/0aa2cfb0bd8949724a68cbac8d8321b4"},"headline":"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D","datePublished":"2023-10-09T15:03:43+00:00","dateModified":"2023-10-09T16:02:12+00:00","mainEntityOfPage":{"@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/"},"wordCount":728,"publisher":{"@id":"https:\/\/www.eenewseurope.com\/en\/#organization"},"keywords":["Circuits 3D","Semiconducteurs"],"articleSection":["Technologies"],"inLanguage":"fr-FR"},{"@type":"WebPage","@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/","url":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/","name":"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D -","isPartOf":{"@id":"https:\/\/www.eenewseurope.com\/en\/#website"},"datePublished":"2023-10-09T15:03:43+00:00","dateModified":"2023-10-09T16:02:12+00:00","description":"TSMC cherche \u00e0 d\u00e9velopper un format de donn\u00e9es standard pour les conceptions de chiplets pour tous les outils de conception EDA.","breadcrumb":{"@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/#breadcrumb"},"inLanguage":"fr-FR","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/www.ecinews.fr\/fr\/tsmc-cherche-a-normaliser-les-protocoles-de-chiplets-3d\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.ecinews.fr\/fr\/"},{"@type":"ListItem","position":2,"name":"TSMC cherche \u00e0 normaliser les protocoles de chiplets 3D"}]},{"@type":"WebSite","@id":"https:\/\/www.eenewseurope.com\/en\/#website","url":"https:\/\/www.eenewseurope.com\/en\/","name":"EENewsEurope","description":"Just another WordPress site","publisher":{"@id":"https:\/\/www.eenewseurope.com\/en\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.eenewseurope.com\/en\/?s={search_term_string}"},"query-input":"required name=search_term_string"}],"inLanguage":"fr-FR"},{"@type":"Organization","@id":"https:\/\/www.eenewseurope.com\/en\/#organization","name":"EENewsEurope","url":"https:\/\/www.eenewseurope.com\/en\/","logo":{"@type":"ImageObject","inLanguage":"fr-FR","@id":"https:\/\/www.eenewseurope.com\/en\/#\/schema\/logo\/image\/","url":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg","contentUrl":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/2022\/02\/logo-1.jpg","width":283,"height":113,"caption":"EENewsEurope"},"image":{"@id":"https:\/\/www.eenewseurope.com\/en\/#\/schema\/logo\/image\/"}},{"@type":"Person","@id":"https:\/\/www.eenewseurope.com\/en\/#\/schema\/person\/0aa2cfb0bd8949724a68cbac8d8321b4","name":"A Delapalisse","image":{"@type":"ImageObject","inLanguage":"fr-FR","@id":"https:\/\/www.eenewseurope.com\/en\/#\/schema\/person\/image\/211ac42237c2e9683c0964086c393cb4","url":"https:\/\/secure.gravatar.com\/avatar\/ad45a8c5da24bc9c7c4940dd1c48a695?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/ad45a8c5da24bc9c7c4940dd1c48a695?s=96&d=mm&r=g","caption":"A Delapalisse"},"sameAs":["http:\/\/ECI"]}]}},"authors":[{"term_id":3640,"user_id":0,"is_guest":1,"slug":"nick-flaherty","display_name":"Nick Flaherty","avatar_url":"https:\/\/secure.gravatar.com\/avatar\/?s=96&d=mm&r=g","0":null,"1":"","2":"","3":"","4":"","5":"","6":"","7":"","8":""},{"term_id":1153,"user_id":34,"is_guest":0,"slug":"adelapalisse","display_name":"A Delapalisse","avatar_url":"https:\/\/secure.gravatar.com\/avatar\/ad45a8c5da24bc9c7c4940dd1c48a695?s=96&d=mm&r=g","0":null,"1":"","2":"","3":"","4":"","5":"","6":"","7":"","8":""}],"_links":{"self":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/434121"}],"collection":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/users\/34"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/comments?post=434121"}],"version-history":[{"count":0,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/434121\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/media\/434039"}],"wp:attachment":[{"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/media?parent=434121"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/categories?post=434121"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/tags?post=434121"},{"taxonomy":"domains","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/domains?post=434121"},{"taxonomy":"author","embeddable":true,"href":"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/ppma_author?post=434121"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}