{"id":431903,"date":"2023-09-12T15:17:41","date_gmt":"2023-09-12T13:17:41","guid":{"rendered":"https:\/\/www.eenewseurope.com\/?p=431903"},"modified":"2023-09-12T15:26:43","modified_gmt":"2023-09-12T13:26:43","slug":"andes-offre-une-ip-risc-v-vectorielle-pour-lia","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/andes-offre-une-ip-risc-v-vectorielle-pour-lia\/","title":{"rendered":"Andes offre une IP RISC-V vectorielle pour l&rsquo;IA"},"content":{"rendered":"<h3>Andes Technology, \u00e0 Ta\u00efwan, exp\u00e9die un mod\u00e8le vectoriel RISC-V multic\u0153ur de 64 bits \u00e0 hautes performances les puces d&rsquo;IA pour centres de donn\u00e9es LLM<\/h3>\n<p>L&rsquo;AX45MPV est la troisi\u00e8me g\u00e9n\u00e9ration de la s\u00e9rie de processeurs vectoriels RISC-V AndesCore et peut \u00e9galement \u00eatre utilis\u00e9 pour les ADAS, l&rsquo;inf\u00e9rence et l&rsquo;apprentissage de l&rsquo;IA, l&rsquo;AR\/VR, le multim\u00e9dia, la robotique et le traitement du signal.<\/p>\n<p>Andes et Meta ont commenc\u00e9 \u00e0 collaborer sur l&rsquo;IA dans les centres de donn\u00e9es avec le c\u0153ur vectoriel RISC-V depuis le d\u00e9but de 2019, ce qui a conduit \u00e0 ce que l&rsquo;AndesCore NX27V g\u00e9n\u00e8re jusqu&rsquo;\u00e0 4 r\u00e9sultats vectoriels (VLEN) de 512 bits par cycle. Depuis lors, les c\u0153urs de processeurs vectoriels RISC-V sont devenus le choix des concepteurs de puces de ML et d&rsquo;IA.<\/p>\n<p>L&rsquo;AX45MPV \u00e9tend les capacit\u00e9s du pipeline \u00e0 double \u00e9mission \u00e0 8 \u00e9tapes, le support Linux et le multic\u0153ur de l&rsquo;AX45MP pr\u00e9c\u00e9dent avec la puissante unit\u00e9 de traitement vectoriel h\u00e9rit\u00e9e et am\u00e9lior\u00e9e du NX27V pour supporter six instructions vectorielles de 1024 bits par cycle.<\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/startup-funds-inference-compute-platform-for-generative-ai\/\">Une startup finance une plateforme de calcul d&rsquo;inf\u00e9rence pour l&rsquo;IA g\u00e9n\u00e9rative<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/blaize-to-add-generative-ai-to-edge-development-tool\/\">Blaize ajoute l&rsquo;IA g\u00e9n\u00e9rative \u00e0 son outil de d\u00e9veloppement<\/a><\/li>\n<\/ul>\n<p>Bien que l&rsquo;AX45MPV soit essentiellement un processeur d&rsquo;application Linux dot\u00e9 de capacit\u00e9s d&rsquo;IA de niveau centre de donn\u00e9es, la prise en charge de Linux et du multic\u0153ur peut \u00eatre omise pour former un processeur de calcul efficace et puissant dans les \u00e9l\u00e9ments de traitement (PE) d&rsquo;une grande baie de calcul.<\/p>\n<p>La capacit\u00e9 de double sortie combin\u00e9e \u00e0 un maximum de six r\u00e9sultats vectoriels (VLEN) de 1024 bits par cycle dans l&rsquo;AX45MPV permet de multiplier par plus de 3 les performances par rapport \u00e0 son pr\u00e9d\u00e9cesseur. Deux interfaces m\u00e9moire de 1024 bits et une nouvelle option de m\u00e9moire locale vectorielle (HVM) \u00e0 large bande passante en sont le support. Il fournit 1 ou 2 ports de banque HVM pour les chargements\/stocks de vecteurs et un moteur DMA externe pour d\u00e9placer des blocs de donn\u00e9es en arri\u00e8re-plan via un port d&rsquo;acc\u00e8s HVM bas\u00e9 sur AXI.<\/p>\n<p>Les t\u00e2ches de calcul n\u00e9cessitant un contr\u00f4le int\u00e9gr\u00e9 du coprocesseur ainsi qu&rsquo;un transfert de donn\u00e9es peuvent utiliser le port de streaming Andes (ASP) qui, avec HVM, double la largeur de bande de la m\u00e9moire en permettant, par exemple, de charger deux donn\u00e9es vectorielles par cycle.<\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/how-transformers-impact-edge-ai-chip-design\/\">L&rsquo;impact des transformateurs sur la conception des puces d&rsquo;intelligence artificielle<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/hailo-ports-transformer-ai-to-embedded-chip\/\">Hailo porte l&rsquo;IA des transformateurs sur une puce int\u00e9gr\u00e9e<\/a><\/li>\n<\/ul>\n<p>L&rsquo;AX45MPV supporte \u00e9galement le dernier ACE (Andes Custom Extension) qui permet aux clients de cr\u00e9er leurs propres instructions vectorielles de type RISC-V. Par exemple, ACE peut \u00eatre utilis\u00e9 pour acc\u00e9l\u00e9rer les fonctions math\u00e9matiques non lin\u00e9aires telles que SoftMax sur Transformer AI.<\/p>\n<p>\u00a0\u00bb Andes est au service des clients de l&rsquo;IA dans les centres de donn\u00e9es depuis 2019 avec l&rsquo;architecture vectorielle RISC-V et a accumul\u00e9 une riche exp\u00e9rience. Dot\u00e9e de la puissante unit\u00e9 vectorielle de 1024 bits, d&rsquo;une prise en charge efficace du multic\u0153ur et de Linux, et de configurations polyvalentes, la troisi\u00e8me g\u00e9n\u00e9ration de processeurs vectoriels d&rsquo;Andes AX45MPV est sp\u00e9cialement con\u00e7ue pour les grands mod\u00e8les de langage (LLM). Avec la mont\u00e9e en puissance des applications d&rsquo;IA g\u00e9n\u00e9rative en 2023, nous voyons l&rsquo;AX45MPV occuper le devant de la sc\u00e8ne dans les segments de l&rsquo;IA et de l&rsquo;apprentissage automatique au-del\u00e0 du cloud\u00a0\u00bb, a d\u00e9clar\u00e9 Charlie Su, pr\u00e9sident et directeur technique d&rsquo;Andes Technology.<\/p>\n<p>Certains clients d&rsquo;Asie et d&rsquo;Am\u00e9rique du Nord ont d\u00e9j\u00e0 acquis une licence pour l&rsquo;AX45MPV, et d&rsquo;autres sont en train de l&rsquo;\u00e9valuer. Les applications couvrent un large \u00e9ventail, de l&rsquo;informatique en cloud\u00a0 \u00e0 edge. Le produit standard AX45MPV, sans support Linux, est disponible imm\u00e9diatement. L&rsquo;ensemble de produits avanc\u00e9s sera accompagn\u00e9 d&rsquo;un support Linux et sera disponible au quatri\u00e8me trimestre 2023.<\/p>\n<p><a href=\"http:\/\/www.andestech.com\">www.andestech.com<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>Andes Technology, \u00e0 Ta\u00efwan, exp\u00e9die un mod\u00e8le vectoriel RISC-V multic\u0153ur de 64 bits \u00e0 hautes performances les puces d&rsquo;IA pour centres de donn\u00e9es LLM L&rsquo;AX45MPV est la troisi\u00e8me g\u00e9n\u00e9ration de la s\u00e9rie de processeurs vectoriels RISC-V AndesCore et peut \u00e9galement \u00eatre utilis\u00e9 pour les ADAS, l&rsquo;inf\u00e9rence et l&rsquo;apprentissage de l&rsquo;IA, l&rsquo;AR\/VR, le multim\u00e9dia, la robotique [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":431615,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[883],"tags":[1754,2198,3641,1674],"domains":[47],"ppma_author":[3640],"class_list":["post-431903","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-technologies","tag-adas-2","tag-ia","tag-risc-v-fr","tag-risc-v-2","domains-electronique-eci"],"acf":[],"yoast_head":"<title>Andes offre une IP RISC-V vectorielle pour l&#039;IA ...<\/title>\n<meta name=\"description\" content=\"Andes Technology a mis au point une IP vectorielle RISC-V multic\u0153ur 64 bits pour les puces d&#039;IA des centres de donn\u00e9es \u00e0 LLM.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" 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