{"id":395307,"date":"2022-09-14T19:29:07","date_gmt":"2022-09-14T17:29:07","guid":{"rendered":"https:\/\/www.eenewseurope.com\/?p=395307"},"modified":"2022-09-14T21:02:54","modified_gmt":"2022-09-14T19:02:54","slug":"arm-ibm-sassocient-pour-une-puce-ia-analogique-basse-puissance","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/arm-ibm-sassocient-pour-une-puce-ia-analogique-basse-puissance\/","title":{"rendered":"ARM, IBM s&rsquo;associent pour une puce IA analogique basse puissance"},"content":{"rendered":"<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Des chercheurs d&rsquo;ARM et d&rsquo;IBM ont d\u00e9velopp\u00e9 une puce de calcul analogique en m\u00e9moire de 14 nm pour l&rsquo;apprentissage automatiqueune faible consommation toujours actif. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Ces t\u00e2ches de perception permanentes dans les applications IoT, appel\u00e9es TinyML, n\u00e9cessitent une efficacit\u00e9 \u00e9nerg\u00e9tique tr\u00e8s \u00e9lev\u00e9e. Le calcul en m\u00e9moire (CiM) analogique utilisant une m\u00e9moire non volatile (NVM) promet une efficacit\u00e9 \u00e9nerg\u00e9tique \u00e9lev\u00e9e et un stockage de mod\u00e8le sur puce autonome. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Cependant, le CiM analogique introduit de nouveaux d\u00e9fis pratiques, notamment la d\u00e9rive de conductance, le bruit de lecture\/\u00e9criture, le gain fixe du convertisseur analogique-num\u00e9rique (ADC), etc. Ceux-ci doivent \u00eatre r\u00e9solus pour obtenir des mod\u00e8les pouvant \u00eatre d\u00e9ploy\u00e9s sur le CiM analogique avec une perte de pr\u00e9cision acceptable. .<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Des chercheurs d&rsquo;ARM et d&rsquo;IBM Research Zurich ont examin\u00e9 les mod\u00e8les TinyML pour les t\u00e2ches populaires de veille (toujours actives) de rep\u00e9rage de mots cl\u00e9s (KWS, Keyword spotting ) et de mots de r\u00e9veil visuels (VWW, Visual Wake Words). Les architectures mod\u00e8les sont sp\u00e9cialement con\u00e7ues pour le CiM analogique et d\u00e9taillent une m\u00e9thodologie d&rsquo;apprentissage compl\u00e8te, pour conserver la pr\u00e9cision face aux probl\u00e8mes de l&rsquo;analogique et aux convertisseurs de donn\u00e9es de faible pr\u00e9cision au moment de l&rsquo;inf\u00e9rence.<\/span><\/span><\/span><\/p>\n<ul>\n<li>\n<p class=\"title\"><a title=\"STMicro pr\u00e9pare une puce IA avec calcul analogique en m\u00e9moire\" href=\"https:\/\/www.ecinews.fr\/fr\/stmicro-prepare-une-puce-ia-avec-calcul-analogique-en-memoire\/\" target=\"_blank\" rel=\"noopener\">STMicro pr\u00e9pare une puce IA avec calcul analogique en m\u00e9moire<\/a><\/p>\n<\/li>\n<li>\n<p class=\"title\"><a title=\"Le Leti d\u00e9voile un capteur d\u2019image de reconnaissance faciale\" href=\"https:\/\/www.ecinews.fr\/fr\/le-leti-devoile-un-capteur-dimage-de-reconnaissance-faciale\/\" target=\"_blank\" rel=\"noopener\">Le Leti d\u00e9voile un capteur d\u2019image de reconnaissance faciale<\/a><\/p>\n<\/li>\n<li>\n<p class=\"title\"><a title=\"1400 coeurs RISC-V pour l\u2019apprentissage automatique sur une puce\" href=\"https:\/\/www.ecinews.fr\/fr\/1400-coeurs-risc-v-sur-une-puce-ml\/\" target=\"_blank\" rel=\"noopener\">1400 coeurs RISC-V pour l\u2019apprentissage automatique sur une puce<\/a><\/p>\n<\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/first-in-memory-computing-chip-for-gddr6\/\">First In Memory Computing chip for GDDR6<\/a><\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Ils ont d\u00e9velopp\u00e9 un acc\u00e9l\u00e9rateur CiM analogique utilisant une m\u00e9moire \u00e0 changement de phase (PCM) \u00e0 surface minimale programmable appel\u00e9 AON-CiM sur une technologie de process de 14 nm. Cette technologie utilise une s\u00e9rie de couches qui \u00e9limine le co\u00fbt des interconnexions complexes associ\u00e9es \u00e0 une conception enti\u00e8rement en pipeline.<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\"> L&rsquo;\u00e9valuation des r\u00e9seaux analogiques sur un simulateur calibr\u00e9, ainsi que sur du mat\u00e9riel r\u00e9el, a montr\u00e9 que la d\u00e9gradation de la pr\u00e9cision est limit\u00e9e \u00e0 0,8 %\/1,2 % apr\u00e8s 24 heures de d\u00e9rive PCM (8 bits). L&rsquo;ex\u00e9cution des r\u00e9seaux sur l&rsquo;acc\u00e9l\u00e9rateur AON-CiM 14 nm d\u00e9montre 8,55\/26,55\/56,67 et 4,34\/12,64\/25,2 TOPS\/W pour le rep\u00e9rage de mots cl\u00e9s (KWS) et les mots d&rsquo;\u00e9veil visuels (VWW) avec des activations 8\/6\/4 bits respectivement.<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Les techniques analogiques de calcul en m\u00e9moire peuvent convenir aux t\u00e2ches de TinyML de perception \u00e0 ultra-basse consommation, telles que la d\u00e9tection de mots cl\u00e9s et les mots d&rsquo;\u00e9veil visuels dans les applications informatiques de pointe\u00a0\u00bb, a d\u00e9clar\u00e9 Paul Whatmough, responsable de la recherche sur l&rsquo;apprentissage automatique chez ARM Research aux \u00c9tats-Unis. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Notre article, en collaboration avec l&rsquo;incroyable \u00e9quipe d&rsquo;IBM Research Zurich, donne une plong\u00e9e approfondie sur la co-conception du mod\u00e8le d&rsquo;apprentissage automatique et du mat\u00e9riel analogique, couvrant la conception de mod\u00e8les et l&rsquo;apprentissage sur du hardware bruyant, ainsi que le hardware compact efficace (et pratique) pour le calcul en couche-s\u00e9rie en m\u00e9moire. Nous testons m\u00eame les mod\u00e8les sur du hardware r\u00e9el.<\/span><\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<p><a href=\"https:\/\/ieeexplore.ieee.org\/abstract\/document\/9855854\">https:\/\/ieeexplore.ieee.org\/abstract\/document\/9855854<\/a><\/p>\n<p><strong>Lire aussi:<\/strong><\/p>\n<p><a href=\"https:\/\/www.ecinews.fr\/news\/silina-courbe-les-capteurs-dimage-echelle-industrielle\">Silina courbe les capteurs d\u2019image \u00e0 \u00e9chelle industrielle<\/a><\/p>\n<h4>Related analog in-memory compute articles<\/h4>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/st-hints-at-analog-in-memory-computing-chip\/\">ST hints at analog in-memory computing chip<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/analog-in-memory-ai-processor-startup-uses-memristors\/\">Analog-in-memory AI processor startup uses memristors<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/axelera-shows-diana-analog-in-memory-computing-chip\/\">Axelera shows DIANA analog in-memory computing chip<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/48-core-neuromorphic-ai-chip-uses-resistive-memory\/\">48 core neuromorphic AI chip uses resistive memory<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/1400-risc-v-cores-for-on-chip-machine-learning\/\">1400 RISC-V cores for on-chip machine learning<\/a><\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Des chercheurs d&rsquo;ARM et d&rsquo;IBM ont d\u00e9velopp\u00e9 une puce de calcul analogique en m\u00e9moire de 14 nm pour l&rsquo;apprentissage automatiqueune faible consommation toujours actif. Ces t\u00e2ches de perception permanentes dans les applications IoT, appel\u00e9es TinyML, n\u00e9cessitent une efficacit\u00e9 \u00e9nerg\u00e9tique tr\u00e8s \u00e9lev\u00e9e. Le calcul en m\u00e9moire (CiM) analogique utilisant une m\u00e9moire non volatile (NVM) promet une [&hellip;]<\/p>\n","protected":false},"author":34,"featured_media":394837,"comment_status":"closed","ping_status":"closed","sticky":true,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[886,26],"tags":[1633,889,906,1759],"domains":[47],"ppma_author":[1153],"class_list":["post-395307","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news-fr","category-technology-news","tag-ai-2","tag-analog-fr","tag-mpus-mcus-fr","tag-tiny-ml","domains-electronique-eci"],"acf":[],"yoast_head":"<title>ARM, IBM s&#039;associent pour une puce IA analogique basse puissance ...<\/title>\n<meta name=\"description\" content=\"Researchers at ARM and IBM have developed a 14nm analog compute in memory chip for low power always on machine learning.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, 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