{"id":393991,"date":"2022-08-31T18:07:22","date_gmt":"2022-08-31T16:07:22","guid":{"rendered":"https:\/\/www.eenewseurope.com\/?p=393991"},"modified":"2022-08-31T18:07:22","modified_gmt":"2022-08-31T16:07:22","slug":"kit-de-developpement-risc-v-pathfinder-en-telechargement-gratuit","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/kit-de-developpement-risc-v-pathfinder-en-telechargement-gratuit\/","title":{"rendered":"Kit de d\u00e9veloppement RISC-V Pathfinder en t\u00e9l\u00e9chargement gratuit"},"content":{"rendered":"<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Intel a utilis\u00e9 des quantit\u00e9s importantes de technologie europ\u00e9enne dans son kit de d\u00e9veloppement Pathfinder RISC-V. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Le kit permet d&rsquo;instancier une vari\u00e9t\u00e9 de c\u0153urs RISC-V et d&rsquo;autres IP sur une carte FPGA (telle que la carte Stratix 10 d&rsquo;Intel, ci-dessus) ainsi que sur des plates-formes de simulation, avec la possibilit\u00e9 d&rsquo;ex\u00e9cuter des syst\u00e8mes d&rsquo;exploitation et des cha\u00eenes d&rsquo;outils dans un IDE unifi\u00e9. Cela permet de gagner du temps lors de l&rsquo;assemblage et du test de diff\u00e9rentes combinaisons d&rsquo;adresses IP dans un environnement unique et constitue un \u00e9l\u00e9ment cl\u00e9 de la d\u00e9cision d&rsquo;Intel de cr\u00e9er un large \u00e9ventail de services de fonderie. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Le kit de d\u00e9veloppement rassemble des outils de v\u00e9rification d\u00e9velopp\u00e9s au Royaume-Uni par Imperas, des blocs de s\u00e9curit\u00e9 de Crypto Quantique et des outils de Codeplay Software avec des c\u0153urs RISC-V configurables et optimis\u00e9s pour la s\u00e9curit\u00e9 de Codasip et Fraunhofer IMS en Allemagne et des capteurs de STMicroelectronics. <\/span><\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/intel-prepares-for-trillion-transistor-era-shake-up\/\">Intel prepares for trillion transistor era shake up<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/intel-goes-full-foundry\/\">Intel goes full foundry,\u00a0<\/a><a href=\"https:\/\/www.eenewseurope.com\/en\/intel-drives-foundry-business-with-1bn-fund\/\">drives foundry business with $1bn fund<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/intel-joins-risc-v-teams-on-foundry-ip\/\">Intel joins RISC-V, teams on foundry IP<\/a><\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Intel Pathfinder est initialement disponible en deux versions, l&rsquo;\u00e9dition Starter et l&rsquo;\u00e9dition professionnelle. L&rsquo;\u00e9dition de Starter est destin\u00e9e aux amateurs, aux universitaires et \u00e0 la communaut\u00e9 des chercheurs et est disponible en t\u00e9l\u00e9chargement gratuit. L&rsquo;\u00e9dition professionnelle est fournie avec un large support d&rsquo;\u00e9cosyst\u00e8me et cible les organisations impliqu\u00e9es dans le silicium et les logiciels commerciaux bas\u00e9s sur RISC-V. Cette \u00e9dition sera mise \u00e0 disposition en fonction des besoins des clients et des capacit\u00e9s sous-jacentes du produit.<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Le groupe Incubation &amp; Disruptive Innovation (IDI) d&rsquo;Intel a pour t\u00e2che d&rsquo;identifier et d\u00e9velopper de nouvelles opportunit\u00e9s commerciales. Le lancement d&rsquo;Intel Pathfinder pour RISC-V illustre notre engagement continu \u00e0 donner vie \u00e0 ces opportunit\u00e9s \u00bb, a d\u00e9clar\u00e9 Sundari Mitra, directeur de l&rsquo;incubation, vice-pr\u00e9sident et directeur g\u00e9n\u00e9ral d&rsquo;IDI. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab Intel Pathfinder pour RISC-V repr\u00e9sente notre engagement continu \u00e0 acc\u00e9l\u00e9rer l&rsquo;adoption de RISC-V et \u00e0 catalyser l&rsquo;\u00e9cosyst\u00e8me autour d&rsquo;une vision open source et bas\u00e9e sur des normes \u00bb, a d\u00e9clar\u00e9 Vijay Krishnan, directeur g\u00e9n\u00e9ral, RISC-V Ventures d&rsquo;Intel.<\/span><\/span><\/span><\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/european-risc-v-chip-for-iot-development-kit\/\">European RISC-V chip for IoT development kit<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/europe-steps-up-as-risc-v-ships-10bn-cores\/\">Europe steps up as RISC-V ships 10bn cores<\/a><\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Codeplay a \u00e9t\u00e9 \u00e0 l&rsquo;avant-garde des logiciels bas\u00e9s sur des normes ouvertes et cette solution avec Intel adopte une approche de d\u00e9veloppement ax\u00e9e sur le logiciel pour que les clients con\u00e7oivent des processeurs pour qu&rsquo;ils s&rsquo;ex\u00e9cutent efficacement sur de vrais logiciels d&rsquo;application\u00a0\u00bb, a d\u00e9clar\u00e9 Andrew Richards, PDG de Codeplay Software.<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Nous sommes ravis d&rsquo;apporter notre offre de s\u00e9curit\u00e9 strat\u00e9gique pour le lancement d&rsquo;Intel\u00ae Pathfinder pour RISC-V\u00a0\u00bb, a d\u00e9clar\u00e9 Shahram Mossayebi, PDG et fondateur de Crypto Quantique. \u00ab Notre objectif est la s\u00e9curit\u00e9 du silicium au cloud, et notre valeur r\u00e9side dans la r\u00e9duction des risques et de la complexit\u00e9 de la s\u00e9curit\u00e9 de la cha\u00eene d&rsquo;approvisionnement, tout en r\u00e9duisant le co\u00fbt de mise en \u0153uvre de conceptions de silicium s\u00e9curis\u00e9es. En travaillant avec Intel\u00ae Pathfinder, nous voyons un \u00e9norme potentiel pour acc\u00e9l\u00e9rer la d\u00e9mocratisation de la s\u00e9curit\u00e9 et du calcul.<\/span><\/span><\/span><\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/crypto-quantique-teams-for-post-quantum-encryption\/\">Crypto Quantique teams for post quantum encryption<\/a><\/li>\n<li><u><a href=\"https:\/\/www.eenewseurope.com\/en\/crypto-quantique-joins-risc-v-international\/\">Crypto Quantique joins RISC-V International<\/a><\/u><\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0La famille de c\u0153urs AIRISC de Fraunhofer IMS \u00e0 Duisburg cible les applications d&rsquo;IA embarqu\u00e9es dans des segments cl\u00e9s tels que les dispositifs m\u00e9dicaux portables, les capteurs de surveillance d&rsquo;\u00e9tat et le traitement d&rsquo;images LIDAR\u00a0\u00bb, d\u00e9clare Alexander Stanitzki, responsable de l&rsquo;unit\u00e9 commerciale, Fraunhofer IMS. \u00ab\u00a0AIRISC fournit un support de s\u00e9curit\u00e9 jusqu&rsquo;\u00e0 ASIL-D et a \u00e9t\u00e9 int\u00e9gr\u00e9 \u00e0 des frameworks d&rsquo;IA populaires. Nous sommes fiers de prendre en charge Intel Pathfinder pour RISC-V avec une conception \u00e9prouv\u00e9e sur FPGA et sur silicium. \u00bb<\/span><\/span><\/span><\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/fraunhofer-extends-risc-v-embedded-processor-for-edge-ai\/\">Fraunhofer extends RISC-V embedded processor for edge AI<\/a><\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab Le Pathfinder pour RISC-V Professional Edition d&rsquo;Intel permet aux architectes SOC et aux d\u00e9veloppeurs de logiciels syst\u00e8me d&rsquo;explorer tout le potentiel des nouvelles libert\u00e9s de conception offertes par RISC-V \u00bb, a d\u00e9clar\u00e9 Simon Davidmann, PDG d&rsquo;Imperas Software Ltd. \u00ab Le kit de plate-forme fixe Imperas dans le cadre d&rsquo;Intel\u00ae Pathfinder inclut un mod\u00e8le de r\u00e9f\u00e9rence pour RISC-V configur\u00e9 pour fournir l&rsquo;environnement de simulation qui prend en charge le m\u00e9tal nu ou les applications avec des syst\u00e8mes d&rsquo;exploitation (Linux ou RTOS) comme point de d\u00e9part pour l&rsquo;innovation avec des composants sp\u00e9cifiques \u00e0 un domaine de nouvelle g\u00e9n\u00e9ration. \u00bb<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab Pathfinder pour RISC-V offre aux d\u00e9veloppeurs une autre entr\u00e9e dans le d\u00e9veloppement et le prototypage rapides d&rsquo;applications \u00bb, a d\u00e9clar\u00e9 Simone Ferri, directrice g\u00e9n\u00e9rale du marketing du sous-groupe MEMS, STMicroelectronics Analog, MEMS and Sensors Group. \u00ab Le module inertiel LSM6DSOX ultrabasse consommation de ST avec c\u0153ur d&rsquo;apprentissage automatique (MLC), machine \u00e0 \u00e9tats finis (FSM Finish State Machine) et fonctions num\u00e9riques avanc\u00e9es disponibles dans les zoos mod\u00e8les h\u00e9berg\u00e9s sur Github pour le MLC et le FSM, offre un bon point de d\u00e9part puissant pour d\u00e9veloppeurs d&rsquo;applications IoT, de jeux, wearable et d&rsquo;\u00e9lectronique personnelle fonctionnant sur batterie.<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Outre les outils de v\u00e9rification Imperas, le kit de d\u00e9veloppement utilise des outils logiciels de Siemens EDA, SoC.One et IOTech Systems avec des c\u0153urs RISC-V d&rsquo;Andes Technology, SiFive, MIPS et le groupe OpenHW, ainsi que des processeurs configurables Tensilica et des acc\u00e9l\u00e9rateurs AI de Cadence Design Systems et le processeur Rocket Core 64 bits de Chips Alliance.<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab Apr\u00e8s avoir port\u00e9 avec succ\u00e8s le c\u0153ur de processeur vectoriel 512 bits tr\u00e8s demand\u00e9 d&rsquo;Andes NX27V et le multic\u0153ur superscalaire 64 bits AX45MP sur la carte FPGA Intel Stratix 10 GX, les concepteurs de SoC disposent d\u00e9sormais de la plate-forme id\u00e9ale \u00e9quip\u00e9e de processeurs de calcul et de contr\u00f4le RISC-V hautes performances pour le d\u00e9veloppement et le prototypage de SoC IA complexes \u00bb, a d\u00e9clar\u00e9 Frankwell Lin, pr\u00e9sident-directeur g\u00e9n\u00e9ral d&rsquo;Andes Technology. <\/span><\/span><\/span><\/p>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/sifive-opens-cambridge-risc-v-design-centre\/\">SiFive opens Cambridge RISC-V design centre<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/codasip-opens-risc-v-design-centre-in-greece\/\">Codasip opens RISC-V design centre in Greece<\/a><\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">D&rsquo;autres logiciels de s\u00e9curit\u00e9 sont disponibles via Check Point Software Technologies et son Quantum IoT Protect Nano Agent pour identifier et pr\u00e9venir les attaques sophistiqu\u00e9es en temps r\u00e9el, y compris une protection optimale contre les vuln\u00e9rabilit\u00e9s zero-day. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Nous sommes vraiment ravis de pouvoir annoncer notre prise en charge de la plate-forme Intel\u00ae\u00a0Pathfinder pour RISC-V\u00a0\u00bb, a d\u00e9clar\u00e9 Keith Steele, PDG d&rsquo;IOTech Systems. \u00ab\u00a0La flexibilit\u00e9 et le choix que le produit apporte \u00e0 la communaut\u00e9 RISC-V en combinaison avec le logiciel de pointe d&rsquo;IOTech fournissent une excellente solution qui peut \u00eatre utilis\u00e9e comme base pour une nouvelle g\u00e9n\u00e9ration d&rsquo;applications industrielles embarqu\u00e9es.\u00a0\u00bb<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Le groupe OpenHW est ravi de voir le lancement de la suite de d\u00e9veloppement Intel Pathfinder pour RISC-V prenant en charge le microcontr\u00f4leur OpenHW CORE-V bas\u00e9 sur le c\u0153ur de classe embarqu\u00e9 CVE4 32 bits et le c\u0153ur de classe d&rsquo;application CVA6 64 bits\u00a0\u00bb, a d\u00e9clar\u00e9 Rick O&rsquo;Connor. , groupe OpenHW, pr\u00e9sident et CEO<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Acc\u00e9dez au <a title=\"Pathfinder for RISC-V\" href=\"https:\/\/pathfinder.intel.com\/registration\" target=\"_blank\" rel=\"noopener\">t\u00e9l\u00e9chargement gratuit<\/a> du kit de d\u00e9veloppement Pathfinder RISC-V<\/span><\/span><\/span><\/p>\n<p>&nbsp;<\/p>\n<h4>Other related RISC-V articles<\/h4>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/tackling-the-challenges-of-risc-v\/\">CEO Interview: tackling the challenges of RISC-V<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/1400-risc-v-cores-for-on-chip-machine-learning\/\">1400 RISC-V cores for on-chip machine learning<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/nordic-semi-sets-up-risc-v-design-team\/\">Nordic Semi sets up RISC-V design team<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/arm-battles-risc-v-at-renesas\/\">ARM battles RISC-V at Renesas<\/a><\/li>\n<\/ul>\n<h4>Other articles on eeNews Europe<\/h4>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/opinion-intels-smart-capital-is-a-warning-from-the-past\/\">Opinion: Intel\u2019s \u2018smart capital\u2019 is a warning from the past<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/power-limits-the-trillion-transistor-era-say-intel-tesla\/\">Power limits the trillion transistor era say Intel, Tesla<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/britishvolt-gigafactory-ceo-steps-down\/\">Britishvolt gigafactory CEO steps down<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/imecs-asic-arm-looks-for-new-ceo\/\">imec\u2019s ASIC arm looks for new CEO<\/a><\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>Intel a utilis\u00e9 des quantit\u00e9s importantes de technologie europ\u00e9enne dans son kit de d\u00e9veloppement Pathfinder RISC-V. Le kit permet d&rsquo;instancier une vari\u00e9t\u00e9 de c\u0153urs RISC-V et d&rsquo;autres IP sur une carte FPGA (telle que la carte Stratix 10 d&rsquo;Intel, ci-dessus) ainsi que sur des plates-formes de simulation, avec la possibilit\u00e9 d&rsquo;ex\u00e9cuter des syst\u00e8mes d&rsquo;exploitation et [&hellip;]<\/p>\n","protected":false},"author":34,"featured_media":393889,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[886,26],"tags":[1633,894,1604,895,899,919,906,1674,910],"domains":[47],"ppma_author":[1153],"class_list":["post-393991","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news-fr","category-technology-news","tag-ai-2","tag-boards-embedded-cards-fr","tag-development-kits","tag-developmentkits-fr","tag-eda-cad-tools-fr","tag-iot-fr","tag-mpus-mcus-fr","tag-risc-v-2","tag-sensing-conditioning-fr","domains-electronique-eci"],"acf":[],"yoast_head":"<title>Kit de d\u00e9veloppement RISC-V Pathfinder en t\u00e9l\u00e9chargement gra...<\/title>\n<meta name=\"description\" content=\"Intel has used significant amounts of European technology in its Pathfinder RISC-V development kit from Codasip, ST and Crypto Quantique\" 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