{"id":392952,"date":"2022-08-21T18:40:09","date_gmt":"2022-08-21T16:40:09","guid":{"rendered":"https:\/\/www.eenewseurope.com\/?p=392952"},"modified":"2022-08-22T08:10:09","modified_gmt":"2022-08-22T06:10:09","slug":"microchip-va-developper-des-processeurs-risc-v-pour-la-nasa","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/microchip-va-developper-des-processeurs-risc-v-pour-la-nasa\/","title":{"rendered":"Microchip va d\u00e9velopper une nouvelle g\u00e9n\u00e9ration de processeurs 12 core RISC-V pour la NASA"},"content":{"rendered":"<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Microchip a remport\u00e9 un projet de 50 millions de dollars pour d\u00e9velopper la prochaine g\u00e9n\u00e9ration de processeurs \u00e0 haute fiabilit\u00e9 pour les missions spatiales bas\u00e9s sur la technologie RISC-V. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Le Jet Propulsion Laboratory de la NASA a s\u00e9lectionn\u00e9 Microchip pour d\u00e9velopper le processeur HPSC (High-Performance Spaceflight Computing) qui fournira au moins 100 fois la capacit\u00e9 de calcul des ordinateurs de vol spatial actuels pour tous les types de futures missions spatiales, de l&rsquo;exploration plan\u00e9taire aux missions sur la surface lunaire ou martienne . <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Le processeur r\u00e9sistant aux radiations et tol\u00e9rant aux pannes sera bas\u00e9 sur 12 instanciations du c\u0153ur X280 RISC-V de SiFive et sera utilis\u00e9 dans une s\u00e9rie d&rsquo;ordinateurs monocartes renforc\u00e9s tol\u00e9rants aux radiations.<\/span><\/span><\/span><\/p>\n<ul>\n<li>\n<div class=\"title-wrapper\">\n<p class=\"title\"><a title=\"Le premier processeur RISC-V commence \u00e0 fonctionner en orbite\" href=\"https:\/\/www.ecinews.fr\/fr\/le-premier-processeur-risc-v-commence-a-fonctionner-en-orbite\/\" target=\"_blank\" rel=\"noopener\">Le premier processeur RISC-V commence \u00e0 fonctionner en orbite<\/a><\/p>\n<p class=\"title\"><a title=\"L\u2019UE lance son programme spatial int\u00e9gr\u00e9 \u00e0 13 milliards d\u2019euros\" href=\"https:\/\/www.ecinews.fr\/fr\/lue-lance-son-programme-spatial-integre-a-13-milliards-deuros\/\" target=\"_blank\" rel=\"noopener\">L\u2019UE lance son programme spatial int\u00e9gr\u00e9 \u00e0 13 milliards d\u2019euros<\/a><\/p>\n<p><a href=\"https:\/\/www.eenewseurope.com\/en\/first-steps-to-european-multicore-risc-v-chip-for-space\/\">First steps to European multicore RISC-V chip for space<\/a><\/div>\n<\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Nos ordinateurs de vol spatiaux actuels ont \u00e9t\u00e9 d\u00e9velopp\u00e9s il y a pr\u00e8s de 30 ans\u00a0\u00bb, a d\u00e9clar\u00e9 Wesley Powell, l&rsquo;ing\u00e9nieur en chef de la NASA pour l&rsquo;avionique avanc\u00e9e. \u00ab\u00a0Bien qu&rsquo;elles aient bien servi les missions pass\u00e9es, les futures missions de la NASA exigent des capacit\u00e9s et une fiabilit\u00e9 informatiques embarqu\u00e9es consid\u00e9rablement accrues. Le nouveau processeur informatique fournira les avanc\u00e9es requises en termes de performances, de tol\u00e9rance aux pannes et de flexibilit\u00e9 pour r\u00e9pondre \u00e0 ces futurs besoins de mission. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Microchip construira, concevra et fournira le processeur HPSC sur trois ans, dans le but d&rsquo;utiliser le processeur lors de futures missions d&rsquo;exploration lunaire et plan\u00e9taire. L&rsquo;architecture \u00e9volutive et modulaire tol\u00e9rante aux pannes comprendra une importante recherche et d\u00e9veloppement. Un \u00e9l\u00e9ment cl\u00e9 est d&rsquo;inclure la possibilit\u00e9 d&rsquo;arr\u00eater des blocs de traitement pour \u00e9conomiser de l&rsquo;\u00e9nergie. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Microchip b\u00e9n\u00e9ficie d&rsquo;une vaste exp\u00e9rience spatiale gr\u00e2ce \u00e0 l&rsquo;acquisition d&rsquo;Atmel et de Microsemi et d&rsquo;une \u00e9quipe de conception pour composants spatiaux. Microsemi entretient des relations \u00e9troites avec SiFive, fournisseur de coeurs RISC-V. Elle dispose d\u00e9j\u00e0 d&rsquo;une gamme de processeurs, de composants r\u00e9seau et de m\u00e9moires tol\u00e9rants aux radiations avec une cha\u00eene d&rsquo;approvisionnement approuv\u00e9e pour les projets de la NASA. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">L&rsquo;Agence spatiale europ\u00e9enne (ESA) a command\u00e9 un programme similaire, qui utilise le jeu d&rsquo;instructions ouvert RISC-V. Les conceptions SPARC et LEON sont \u00e9galement toujours utilis\u00e9es dans des projets spatiaux.<\/span><\/span><\/span><\/p>\n<ul>\n<li><a href=\"https:\/\/www.ecinews.fr\/news\/leurope-pilote-les-premiers-processeurs-spatiaux-arm-m7\">L\u2019Europe pilote les premiers processeurs spatiaux ARM M7<\/a><\/li>\n<li>\n<p class=\"title\"><a title=\"Premi\u00e8res \u00e9tapes pour NOEL-V le chip spatial europ\u00e9en multicore RISC-V\" href=\"https:\/\/www.ecinews.fr\/fr\/premieres-etapes-pour-noel-v-le-chip-spatial-europeen-multicore-risc-v\/\" target=\"_blank\" rel=\"noopener\">Premi\u00e8res \u00e9tapes pour NOEL-V le chip spatial europ\u00e9en multicore RISC-V<\/a><\/p>\n<\/li>\n<\/ul>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab\u00a0Nous sommes ravis que la NASA ait choisi Microchip comme partenaire pour d\u00e9velopper la plate-forme de nouvelle g\u00e9n\u00e9ration de processeurs de calcul qualifi\u00e9e pour l&rsquo;espace \u00a0\u00bb a d\u00e9clar\u00e9 Babak Samimi, vice-pr\u00e9sident de l&rsquo;unit\u00e9 commerciale Communications de Microchip. \u00abNous r\u00e9alisons un investissement conjoint avec la NASA sur une nouvelle plate-forme de calcul fiable et transformatrice. Elle fournira une mise en r\u00e9seau Ethernet compl\u00e8te, un traitement avanc\u00e9 de l&rsquo;intelligence artificielle\/apprentissage automatique et une prise en charge de la connectivit\u00e9 tout en offrant un gain de performances, une tol\u00e9rance aux pannes et une architecture de s\u00e9curit\u00e9 sans pr\u00e9c\u00e9dent \u00e0 faible consommation d&rsquo;\u00e9nergie \u00bb, a-t-il d\u00e9clar\u00e9.<\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">\u00ab Nous favoriserons un \u00e9cosyst\u00e8me \u00e0 l&rsquo;\u00e9chelle de l&rsquo;industrie de fabricants de calculateurs monocarte ancr\u00e9s sur le processeur HPSC et les solutions syst\u00e8me compl\u00e8tes et qualifi\u00e9es pour l&rsquo;espace de Microchip afin de b\u00e9n\u00e9ficier d&rsquo;une nouvelle g\u00e9n\u00e9ration de conceptions de calcul de pointe critiques optimis\u00e9es pour la taille, le poids et la puissance. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Selon la NASA, le processeur HPSC de Microchip pourrait \u00eatre utile \u00e0 d&rsquo;autres agences gouvernementales am\u00e9ricaines pour les syst\u00e8mes satellitaires. <\/span><\/span><\/span><\/p>\n<p><span class=\"VIiyi\" lang=\"fr\"><span class=\"JLqJ4b\" data-language-for-alternatives=\"fr\" data-language-to-translate-into=\"en\" data-phrase-index=\"0\" data-number-of-phrases=\"1\"><span class=\"Q4iAWc\">Le processeur pourrait potentiellement \u00eatre utilis\u00e9 pour des syst\u00e8mes commerciaux sur Terre qui n\u00e9cessitent des besoins informatiques de pointe similaires \u00e0 ceux des missions spatiales et qui sont capables de poursuivre les op\u00e9rations en toute s\u00e9curit\u00e9 si un composant du syst\u00e8me tombe en panne. Ces applications potentielles incluent l&rsquo;automatisation industrielle, l&rsquo;informatique de pointe, la transmission de donn\u00e9es Ethernet sensible au temps, l&rsquo;intelligence artificielle et m\u00eame les passerelles Internet des objets, qui relient diverses technologies de communication.<\/span><\/span><\/span><\/p>\n<p><a href=\"http:\/\/www.nasa.gov\">www.nasa.gov<\/a>; <a href=\"http:\/\/www.microchip.com\">www.microchip.com<\/a><\/p>\n<h4>Related articles<\/h4>\n<ul>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/cots-based-ethernet-transceiver-is-radiation-tolerant\/\">COTS-based Ethernet transceiver is radiation-tolerant<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewseurope.com\/en\/16-core-risc-v-chip-for-space-designs\/\">16 core RISC-V chip for space designs<\/a><\/li>\n<li><a href=\"https:\/\/www.eenewsembedded.com\/en\/serial-64-mbit-flash-memory-equivalent-part-for-space\/\">Serial 64-Mbit Flash memory equivalent part for space<\/a><\/li>\n<\/ul>\n<p>&nbsp;<\/p>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Microchip a remport\u00e9 un projet de 50 millions de dollars pour d\u00e9velopper la prochaine g\u00e9n\u00e9ration de processeurs \u00e0 haute fiabilit\u00e9 pour les missions spatiales bas\u00e9s sur la technologie RISC-V. Le Jet Propulsion Laboratory de la NASA a s\u00e9lectionn\u00e9 Microchip pour d\u00e9velopper le processeur HPSC (High-Performance Spaceflight Computing) qui fournira au moins 100 fois la capacit\u00e9 [&hellip;]<\/p>\n","protected":false},"author":34,"featured_media":392576,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[886,18],"tags":[906,1674],"domains":[47],"ppma_author":[1153],"class_list":["post-392952","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-news-fr","category-business-news","tag-mpus-mcus-fr","tag-risc-v-2","domains-electronique-eci"],"acf":[],"yoast_head":"<title>Microchip va d\u00e9velopper une nouvelle g\u00e9n\u00e9ration de processeu...<\/title>\n<meta name=\"description\" content=\"Microchip va d\u00e9velopper la prochaine g\u00e9n\u00e9ration de processeurs \u00e0 haute fiabilit\u00e9 pour les missions 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