{"id":222119,"date":"2011-07-24T22:00:00","date_gmt":"2011-07-24T22:00:00","guid":{"rendered":"https:\/\/eenewseurope.artwhere.co\/circuit-de-gestion-de-puissance-a-haut-niveau-dintegration\/"},"modified":"2011-07-24T22:00:00","modified_gmt":"2011-07-24T22:00:00","slug":"circuit-de-gestion-de-puissance-a-haut-niveau-dintegration","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/circuit-de-gestion-de-puissance-a-haut-niveau-dintegration\/","title":{"rendered":"Circuit de gestion de puissance \u00e0 haut niveau d’int\u00e9gration"},"content":{"rendered":"

Les régulateurs abaisseurs intégrés sont déphasés de 180 degrés pour réduire le filtrage d’entrée, ce qui permet d’employer des condensateurs d’entrée plus compacts tout en réduisant le niveau de bruit en entrée. Une broche dédiée permet de forcer les deux régulateurs en mode opératoire PWM ou PWM\/PSM automatique pour maximaliser le rendement. Le faible courant de repos, la faible chute de tension et la vaste plage de tension d’entrée qui caractérisent les régulateurs ADP5034 et ADP5034 permettent de mieux gérer la consommation d’énergie.
\nLes régulateurs LDO intégrés affichent un taux de réjection ligne élevé de 65 dB entre 1 et 10 kHz tout en affichant un bruit inférieur à 80 µVeff nécessaire pour l’alimentation de circuits analogiques.<\/p>\n

http:\/\/www.analog.com\/ADP5034
\nhttp:\/\/www.analog.com\/ADP5024<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

Analog Devices annonce sous la r\u00e9f\u00e9rence ADP5034 un nouveau r\u00e9gulateur \u00e0 faible chute de tension (LDO). Ce circuit de gestion de puissance \u00e0 haut niveau d’int\u00e9gration combine deux r\u00e9gulateurs abaisseurs haut rendement \u00e0 1,2 A\/3 MHz et deux r\u00e9gulateurs LDO \u00e0 300 mA dans un bo\u00eetier compact LFCSP (Lead-Frame Chip-Scale Package). Par ailleurs, ADI annonce la disponibilit\u00e9 du r\u00e9gulateur LDO ADP5024. Identique au r\u00e9gulateur ADP5034, ce mod\u00e8le ne comprend qu’un seul r\u00e9gulateur LDO \u00e0 300 mA. Occupant seulement 69 mm\u00b2 au total, ces deux r\u00e9gulateurs abaisseurs\/LDO sont con\u00e7us pour faire face \u00e0 la r\u00e9duction de l’espace disponible sur les circuits imprim\u00e9s et aux exigences de performances croissantes des processeurs et r\u00e9seaux logiques programmables FPGA.<\/p>\n","protected":false},"author":22,"featured_media":222120,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[881],"tags":[],"domains":[47],"ppma_author":[1149],"class_list":["post-222119","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-nouveaux-produits","domains-electronique-eci"],"acf":[],"yoast_head":"Circuit de gestion de puissance \u00e0 haut niveau d'int\u00e9gration ...<\/title>\n<meta name=\"description\" content=\"Analog Devices annonce sous la r\u00e9f\u00e9rence ADP5034 un nouveau r\u00e9gulateur \u00e0 faible chute de tension (LDO). Ce circuit de gestion de puissance \u00e0 haut niveau...\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/222119\/\" \/>\n<meta property=\"og:locale\" content=\"fr_FR\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Circuit de gestion de puissance \u00e0 haut niveau d'int\u00e9gration\" \/>\n<meta property=\"og:description\" content=\"Analog Devices annonce sous la r\u00e9f\u00e9rence ADP5034 un nouveau r\u00e9gulateur \u00e0 faible chute de tension (LDO). Ce circuit de gestion de puissance \u00e0 haut niveau d'int\u00e9gration combine deux r\u00e9gulateurs abaisseurs haut rendement \u00e0 1,2 A\/3 MHz et deux r\u00e9gulateurs LDO \u00e0 300 mA dans un bo\u00eetier compact LFCSP (Lead-Frame Chip-Scale Package). Par ailleurs, ADI annonce la disponibilit\u00e9 du r\u00e9gulateur LDO ADP5024. Identique au r\u00e9gulateur ADP5034, ce mod\u00e8le ne comprend qu'un seul r\u00e9gulateur LDO \u00e0 300 mA. Occupant seulement 69 mm\u00b2 au total, ces deux r\u00e9gulateurs abaisseurs\/LDO sont con\u00e7us pour faire face \u00e0 la r\u00e9duction de l'espace disponible sur les circuits imprim\u00e9s et aux exigences de performances croissantes des processeurs et r\u00e9seaux logiques programmables FPGA.\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/222119\/\" \/>\n<meta property=\"og:site_name\" content=\"EENewsEurope\" \/>\n<meta property=\"article:published_time\" content=\"2011-07-24T22:00:00+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.ecinews.fr\/wp-content\/uploads\/import\/default\/files\/import\/eci2243_adi.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"1200\" \/>\n\t<meta property=\"og:image:height\" content=\"1200\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"eeNews Europe\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" 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