{"id":177731,"date":"2017-03-31T02:51:40","date_gmt":"2017-03-31T02:51:40","guid":{"rendered":"https:\/\/eenewseurope.artwhere.co\/outil-de-conception-dft-pour-pads-de-mentor-graphics\/"},"modified":"2017-03-31T02:51:40","modified_gmt":"2017-03-31T02:51:40","slug":"outil-de-conception-dft-pour-pads-de-mentor-graphics","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/outil-de-conception-dft-pour-pads-de-mentor-graphics\/","title":{"rendered":"Outil de conception DFT pour PADS de Mentor Graphics"},"content":{"rendered":"<p>Les circuits imprim\u00e9s (PCB) sont de plus en plus denses et l&rsquo;acc\u00e8s aux broches sous de nombreux types de bo\u00eetiers, tels que les BGA, est pratiquement impossible. Cette solution a \u00e9t\u00e9 con\u00e7ue pour r\u00e9soudre ce probl\u00e8me d&rsquo;acc\u00e8s et il est donc d&rsquo;une importance vitale que la cha\u00eene JTAG fonctionne parfaitement d\u00e8s le stade de la saisie de sch\u00e9ma. Le fait de ne pas identifier et de ne pas corriger les erreurs de conception en amont peut entra\u00eener une reprise du PCB, ainsi qu\u2019un retard co\u00fbteux du projet en cours.<br \/>\nCe plug-in aide \u00e0 valider la connectivit\u00e9 de la cha\u00eene JTAG, gr\u00e2ce \u00e0 une int\u00e9gration compl\u00e8te avec l&rsquo;environnement de saisie de sch\u00e9ma PADS.<\/p>\n<p>\u00ab\u00a0Les produits PADS incluent maintenant l&rsquo;Assistant XJTAG DFT, ce qui fournit aux ing\u00e9nieurs une interface gratuite et facile \u00e0 utiliser pour v\u00e9rifier si les cha\u00eenes JTAG sont correctement connect\u00e9es et termin\u00e9es d\u00e8s le stade de la saisie de sch\u00e9ma, bien avant que la carte rentre en production,\u00a0\u00bb d\u00e9clare Jim Martens, Directeur Marketing Produit, PADS Solutions Group. \u00ab\u00a0En d\u00e9tectant et en corrigeant ces d\u00e9fauts plus t\u00f4t, les entreprises \u00e9conomisent du temps et de l\u2019argent. Ce logiciel est disponible gratuitement pour les utilisateurs de PADS VX.2.1 ou sup\u00e9rieur et peut \u00eatre t\u00e9l\u00e9charg\u00e9 depuis le site www.xjtag.com\/pads.\u00a0\u00bb<\/p>\n<p>Cet assistant DFT comprend deux \u00e9l\u00e9ments cl\u00e9s, le \u00ab\u00a0XJTAG Chain Checker\u00a0\u00bb et le \u00ab\u00a0XJTAG Access Viewer\u00a0\u00bb.<br \/>\nLe Chain Checker identifie les erreurs courantes dans une cha\u00eene d\u2019analyse JTAG, tels que les ports d\u2019acc\u00e8s de test (TAP) mal connect\u00e9s. En effet, la moindre erreur de branchement emp\u00eachera le bon fonctionnement de l\u2019int\u00e9gralit\u00e9 de la cha\u00eene d\u2019analyse. En outre, il identifie les erreurs de connexion et en informe le d\u00e9veloppeur au cours du processus de conception. Les erreurs de terminaison incorrecte des ports TAP sont \u00e9galement identifi\u00e9es.<\/p>\n<hr \/>\n<p>L\u2019Access Viewer&nbsp;superpose le p\u00e9rim\u00e8tre de test \u00ab\u00a0Boundary Scan\u00a0\u00bb sur le sch\u00e9ma, ce qui permet \u00e0 l\u2019utilisateur de savoir instantan\u00e9ment quels composants seront accessibles \u00e0 l\u2019aide de l\u2019outil \u00ab\u00a0Boundary Scan\u00a0\u00bb et o\u00f9 la couverture de tests peut \u00eatre \u00e9tendue. Les ing\u00e9nieurs peuvent mettre en \u00e9vidence les interconnexions s\u00e9par\u00e9ment en vue d\u2019afficher sur le sch\u00e9ma les acc\u00e8s en lecture, \u00e9criture, les alimentations, ainsi que les interconnexions sans acc\u00e8s JTAG.<\/p>\n<p>Pendant que le premier prototype est en cours de fabrication, l\u2019assistant DFT offre aux ing\u00e9nieurs la possibilit\u00e9 d\u2019exporter un projet XJTAG pr\u00e9liminaire \u00e0 partir de l&rsquo;environnement PADS vers le logiciel de d\u00e9veloppement XJTAG o\u00f9 d\u2019autres tests suppl\u00e9mentaires peuvent \u00eatre r\u00e9alis\u00e9s. La carte peut ensuite \u00eatre test\u00e9e d\u00e8s sa disponibilit\u00e9. Cela fournit une fonctionnalit\u00e9 vitale aux ing\u00e9nieurs \u00e9lectroniques \u00e0 travers le monde.<\/p>\n<p><a href=\"http:\/\/www.xjtag.com\/pads\" target=\"_blank\" rel=\"noopener\">www.xjtag.com\/pads<\/a><\/p>\n<p><a href=\"http:\/\/www.mentor.com\" target=\"_blank\" rel=\"noopener\">www.mentor.com<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"<p>D\u00e9velopp\u00e9 pour le logiciel de sch\u00e9matique \u00e9lectronique PADS de Mentor Graphics, le plug-in \u00ab\u00a0Assistant XJTAG DFT\u00a0\u00bb de XJTAG augmente de fa\u00e7on significative les capacit\u00e9s de \u00ab\u00a0Conception en Vue du Test\u00a0\u00bb (DFT) et du d\u00e9bogage de l\u2019environnement de sch\u00e9matique et de conception de circuits imprim\u00e9s PADS. Cet outil simple d\u2019emploi \u00e9vite de co\u00fbteuses reprises en corrigeant les erreurs au stade de la conception.<\/p>\n","protected":false},"author":9,"featured_media":177732,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[881],"tags":[899],"domains":[47],"ppma_author":[1141],"class_list":["post-177731","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-nouveaux-produits","tag-eda-cad-tools-fr","domains-electronique-eci"],"acf":[],"yoast_head":"<title>Outil de conception DFT pour PADS de Mentor Graphics ...<\/title>\n<meta name=\"description\" content=\"D\u00e9velopp\u00e9 pour le logiciel de sch\u00e9matique \u00e9lectronique PADS de Mentor Graphics, le plug-in &quot;Assistant XJTAG DFT&quot; de XJTAG augmente de fa\u00e7on...\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.ecinews.fr\/fr\/wp-json\/wp\/v2\/posts\/177731\/\" \/>\n<meta property=\"og:locale\" content=\"fr_FR\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Outil de conception DFT pour PADS de Mentor Graphics\" \/>\n<meta property=\"og:description\" content=\"D\u00e9velopp\u00e9 pour le logiciel de sch\u00e9matique \u00e9lectronique PADS de Mentor Graphics, le plug-in &quot;Assistant XJTAG DFT&quot; de XJTAG augmente de fa\u00e7on significative les capacit\u00e9s de &quot;Conception en Vue du Test&quot; (DFT) et du d\u00e9bogage de l\u2019environnement de sch\u00e9matique et de conception de circuits imprim\u00e9s PADS. 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