{"id":110102,"date":"2018-09-16T06:00:00","date_gmt":"2018-09-16T06:00:00","guid":{"rendered":"https:\/\/\/optimiser-la-fabricabilite-des-cartes-electroniques\/"},"modified":"2018-09-16T06:00:00","modified_gmt":"2018-09-16T06:00:00","slug":"optimiser-la-fabricabilite-des-cartes-electroniques","status":"publish","type":"post","link":"https:\/\/www.ecinews.fr\/fr\/optimiser-la-fabricabilite-des-cartes-electroniques\/","title":{"rendered":"Optimiser la fabricabilit\u00e9 des cartes \u00e9lectroniques"},"content":{"rendered":"<p>Cette approche permet de r\u00e9duire les reprises, de raccourcir les cycles de conception et d\u2019acc\u00e9l\u00e9rer le lancement de nouveaux produits. Avec la technologie Cadence DesignTrue DFM (Design For Manufacturability), les clients r\u00e9duisent de moiti\u00e9, voire de deux tiers, le nombre de questions techniques (TQ) formul\u00e9es par les fabricants gr\u00e2ce \u00e0 l\u2019utilisation de r\u00e8gles sur mesure d\u2019isolement, de couronnes minimales, des caract\u00e9ristiques du cuivre et des masques, dans le but de v\u00e9rifier que les cartes sont correctement con\u00e7ues d\u00e8s la premi\u00e8re fois.<br \/>\nLa solution Cadence DesignTrue DFM signale en temps r\u00e9el les violations de r\u00e8gles de fabrication au cours du processus d\u2019implantation des circuits imprim\u00e9s aux utilisateurs des outils de conception Allegro et OrCAD de Cadence. Avec tous les autres outils de conception de circuits imprim\u00e9s, les concepteurs doivent attendre la fin du processus de conception pour valider le processus DFM en sortie de fabrication, avec \u00e0 la cl\u00e9 de fr\u00e9quentes reprises et des retards importants.<br \/>\nNeuf fabricants de circuits imprim\u00e9s ont d\u00e9j\u00e0 rejoint le programme de partenariat Cadence DesignTrue, ce qui leur permet de distribuer leurs r\u00e8gles de fabrication aux clients de Cadence&nbsp;: Bay Area Circuits, CircuitHub, Mass Design, Multek, OSH Park, Rocket EMS, Sierra Circuits, Tempo Automation et W\u00fcrth Elektronik.&nbsp;<\/p>\n<p><a href=\"http:\/\/www.cadence.com\/go\/designtrueportals%20\/t%20_blank\">www.cadence.com\/go\/designtrueportals<\/a>.<\/p>\n<h3 class=\"title\"><a href=\"http:\/\/www.electronique-eci.com\/news\/cadence-annonce-la-certification-de-son-flot-complet-doutils-numeriques-pour-la-technologie-fd\">Cadence annonce la certification de son flot complet d\u2019outils num\u00e9riques pour la technologie FD-SOI en 22 nm<\/a><\/h3>\n<h3 class=\"title\"><a href=\"http:\/\/www.electronique-eci.com\/news\/cadence-accelere-les-cycles-de-conception-des-cartes\">Cadence acc\u00e9l\u00e8re les cycles de conception des cartes<\/a><\/h3>\n<h3 class=\"title\"><a href=\"http:\/\/www.electronique-eci.com\/news\/un-partenariat-cadence-et-arcsoft\">Un partenariat Cadence et ArcSoft <\/a><\/h3>\n<p>&nbsp;<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Cadence Design Systems, Inc. annonce la cr\u00e9ation d\u2019un vaste \u00e9cosyst\u00e8me de partenaires initialement compos\u00e9 de neuf fabricants de circuits imprim\u00e9s (PCB) et dont l\u2019objectif est de permettre aux clients d\u2019acc\u00e9der facilement aux fichiers de r\u00e8gles technologiques dont ils ont besoin pour v\u00e9rifier la fabricabilit\u00e9 de leurs cartes \u00e9lectroniques et ce d\u00e8s le d\u00e9but du processus de conception. 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