{"version":"1.0","provider_name":"EENewsEurope","provider_url":"https:\/\/www.ecinews.fr\/fr\/","author_name":"eeNews Europe","author_url":"https:\/\/www.ecinews.fr\/fr\/author\/eenews-europe\/","title":"FPGA\u00a0 pour syst\u00e8mes miniatures","type":"rich","width":600,"height":338,"html":"<blockquote class=\"wp-embedded-content\" data-secret=\"UfajHUGo9r\"><a href=\"https:\/\/www.ecinews.fr\/fr\/fpga-pour-systemes-miniatures\/\">FPGA\u00a0 pour syst\u00e8mes miniatures<\/a><\/blockquote><iframe sandbox=\"allow-scripts\" security=\"restricted\" src=\"https:\/\/www.ecinews.fr\/fr\/fpga-pour-systemes-miniatures\/embed\/#?secret=UfajHUGo9r\" width=\"600\" height=\"338\" title=\"\u00ab\u00a0FPGA\u00a0 pour syst\u00e8mes miniatures\u00a0\u00bb &#8212; EENewsEurope\" data-secret=\"UfajHUGo9r\" frameborder=\"0\" marginwidth=\"0\" marginheight=\"0\" scrolling=\"no\" class=\"wp-embedded-content\"><\/iframe><script type=\"text\/javascript\">\n\/* <![CDATA[ *\/\n\/*! This file is auto-generated *\/\n!function(d,l){\"use strict\";l.querySelector&&d.addEventListener&&\"undefined\"!=typeof URL&&(d.wp=d.wp||{},d.wp.receiveEmbedMessage||(d.wp.receiveEmbedMessage=function(e){var t=e.data;if((t||t.secret||t.message||t.value)&&!\/[^a-zA-Z0-9]\/.test(t.secret)){for(var s,r,n,a=l.querySelectorAll('iframe[data-secret=\"'+t.secret+'\"]'),o=l.querySelectorAll('blockquote[data-secret=\"'+t.secret+'\"]'),c=new RegExp(\"^https?:$\",\"i\"),i=0;i<o.length;i++)o[i].style.display=\"none\";for(i=0;i<a.length;i++)s=a[i],e.source===s.contentWindow&&(s.removeAttribute(\"style\"),\"height\"===t.message?(1e3<(r=parseInt(t.value,10))?r=1e3:~~r<200&&(r=200),s.height=r):\"link\"===t.message&&(r=new URL(s.getAttribute(\"src\")),n=new URL(t.value),c.test(n.protocol))&&n.host===r.host&&l.activeElement===s&&(d.top.location.href=t.value))}},d.addEventListener(\"message\",d.wp.receiveEmbedMessage,!1),l.addEventListener(\"DOMContentLoaded\",function(){for(var e,t,s=l.querySelectorAll(\"iframe.wp-embedded-content\"),r=0;r<s.length;r++)(t=(e=s[r]).getAttribute(\"data-secret\"))||(t=Math.random().toString(36).substring(2,12),e.src+=\"#?secret=\"+t,e.setAttribute(\"data-secret\",t)),e.contentWindow.postMessage({message:\"ready\",secret:t},\"*\")},!1)))}(window,document);\n\/* ]]> *\/\n<\/script>\n","thumbnail_url":"https:\/\/www.ecinews.fr\/wp-content\/uploads\/import\/default\/files\/import\/eci3721_lattice.jpg","thumbnail_width":1500,"thumbnail_height":2100,"description":"Lattice Semiconductor vient d'annoncer le FPGA iCE40 LP384, le plus petit membre de sa famille de FPGA iCE40 d'ultra faible densit\u00e9. Permettant aux concepteurs d'ajouter rapidement des fonctions et de diff\u00e9rencier des produits sensibles aux co\u00fbts, \u00e0 l'encombrement et \u00e0 la consommation, ce FPGA de petite empreinte est id\u00e9al pour des\u00a0 applications comme les dispositifs portables de surveillance m\u00e9dicale, les smartphones, les cam\u00e9ras num\u00e9riques, les liseuses et les syst\u00e8mes embarqu\u00e9s compacts."}